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As filed with the Securities and Exchange Commission on April 14, 2022
 
 
UNITED STATES
SECURITIES AND EXCHANGE COMMISSION
Washington, D.C. 20549
 
 
FORM
20-F
 
 
 
REGISTRATION STATEMENT PURSUANT TO SECTION 12(b) OR 12(g) OF THE SECURITIES EXCHANGE ACT OF 1934
OR
 
ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934
For the fiscal year ended December 31, 2021
OR
 
TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934
OR
 
SHELL COMPANY REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934
Date of event requiring this shell company report
Commission file number
 
001–37928
 
 
南茂科技股份有限公司
(Exact Name of Registrant as Specified in Its Charter)
 
 
ChipMOS TECHNOLOGIES INC.
(Translation of Registrant’s Name into English)
Republic of China
(Jurisdiction of Incorporation or Organization)
No. 1, R&D Road 1, Hsinchu Science Park
Hsinchu
 
300-092,
 Taiwan, Republic of China
(Address of Principal Executive Offices)
Silvia Su
Vice President, Finance and Accounting Management Center
ChipMOS TECHNOLOGIES INC.
No. 1, R&D Road 1, Hsinchu Science Park
Hsinchu
 
300-092,
 Taiwan
,
Republic of China
Telephone:
+
886
-
3-577-0055
Facsimile: +886-3-566-8981
(Name, Telephone,
E-mail
and/or Facsimile Number and Address of Company Contact Person)
Securities registered or to be registered pursuant to Section 12(b) of the Act:
 
Title of Each Class
 
Trading
Symbol(s)
 
Name of Each Exchange
on Which Registered
Common Shares, par value NT$10 per share*
 
IMOS*
 
The NASDAQ Global Select Market*
Securities registered or to be registered pursuant to Section 12(g) of the Act:
None
(Title of Class)
Securities for which there is a reporting obligation pursuant to Section 15(d) of the Act:
None
(Title of Class)
 
 
Indicate the number of outstanding shares of each of the issuer’s classes of capital or common stock as of the close of the period covered by the annual report.
As of December 31, 2021, 727,240,126 Common Shares, par value NT$10 each, were outstanding.
Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act.    Yes  ☐    No  ☒
If this report is an annual or transition report, indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or 15(d) of the Securities Exchange Act of 1934.    Yes  ☐    No  ☒
Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days.    Yes  ☒    No  ☐
Indicate by check mark whether the registrant has submitted electronically every Interactive Data File required to be submitted pursuant to Rule 405 of Regulation
S-T
(§232.405 of this chapter) during the preceding 12 months (or for such shorter period that the registrant was required to submit such files).    Yes  ☒    No  ☐
Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, a
non-accelerated
filer, or an emerging growth company. See definition of “large accelerated filer”, “accelerated filer”, and “emerging growth company” in Rule
12b-2
of the Exchange Act. :
Large Accelerated Filer  
        Accelerated
Filer
  
        Non-Accelerated
Filer  ☐        Emerging growth company  
If an emerging growth company that prepares its financial statements in accordance with U.S. GAAP, indicate by check mark if the registrant has elected not to use the extended transition period for complying with any new or revised financial accounting standards provided pursuant to Section 13(a) of the Exchange Act.  ☐
Indicate by check mark whether the registrant has filed a report on and attestation to its management’s assessment of the effectiveness of its internal control over financial reporting under Section 404(b) of the Sarbanes-Oxley Act (15 U.S.C. 7262(b)) by the registered public accounting firm that prepared or issued its audit report.  
Indicate by check mark which basis of accounting the registrant has used to prepare the financial statements included in this filing.
 
U.S. GAAP  ☐
  
International Financial Reporting Standards as issued
by the International Accounting Standards Board  ☒
   Other  ☐
If “Other” has been checked in response to the previous question, indicate by check mark which financial statement item the registrant has elected to follow.
Item 17  ☐    Item 18  ☐
If this is an annual report, indicate by check mark whether the registrant is a shell company (as defined in Rule
12b-2
of the Exchange Act).    Yes  ☐    No  
 
*
Not for trading, but only in connection with the listing on the NASDAQ Global Select Market of American Depositary Receipts evidencing American Depositary Shares (the “ADSs”), each representing 20 common shares of ChipMOS TECHNOLOGIES INC.
 
 
 

TABLE OF CONTENTS
ChipMOS TECHNOLOGIES INC.
 
  
 
1
 
   
  
 
2
 
     
Item 1.
 
  
 
2
 
     
Item 2.
 
  
 
2
 
     
Item 3.
 
  
 
2
 
     
Item 4.
 
  
 
17
 
     
Item 4A.
 
  
 
42
 
     
Item 5.
 
  
 
42
 
     
Item 6.
 
  
 
55
 
     
Item 7.
 
  
 
58
 
     
Item 8.
 
  
 
60
 
     
Item 9.
 
  
 
61
 
     
Item 10.
 
  
 
61
 
     
Item 11.
 
  
 
74
 
     
Item 12.
 
  
 
75
 
   
  
 
77
 
     
Item 13.
 
  
 
77
 
     
Item 14.
 
  
 
77
 
     
Item 15.
 
  
 
77
 
     
Item 16A.
 
  
 
78
 
     
Item 16B.
 
  
 
78
 
     
Item 16C.
 
  
 
78
 
     
Item 16D.
 
  
 
78
 
     
Item 16E.
 
  
 
78
 
     
Item 16F.
 
  
 
78
 
     
Item 16G.
 
  
 
78
 
     
Item 16H.
 
  
 
81
 
     
Item 16I.
 
  
 
81
 
   
  
 
81
 
     
Item 17.
 
  
 
81
 
     
Item 18.
 
  
 
81
 
     
Item 19.
 
  
 
81
 

CAUTIONARY STATEMENT FOR PURPOSES OF THE “SAFE HARBOR” PROVISIONS OF
THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995
Except for historical matters, the matters discussed in this Annual Report on Form
20-F
are forward-looking statements that are subject to a number of significant risks and uncertainties and are based on information as of the date hereof. These statements are generally indicated by the use of forward-looking terminology such as the words “anticipate”, “believe”, “estimate”, “expect”, “intend”, “may”, “plan”, “project”, “will”, “could”, “might”, “should” and other words and phrases of similar import that express an indication of actions or results of actions that may or are expected to occur in the future. These statements appear in a number of places throughout this Annual Report on Form
20-F
and include statements regarding our intentions, beliefs or current expectations concerning, among other things, our results of operations, financial condition, liquidity, prospects, growth, strategies and the industries in which we operate.
By their nature, forward-looking statements involve risks and uncertainties because they relate to events and depend on circumstances that may or may not occur in the future. Forward-looking statements are not guarantees of future performance and our actual results of operations, financial condition and liquidity, and the development of the industries in which we operate may differ materially from those made in or suggested by the forward-looking statements contained in this Annual Report on Form
20-F.
Important factors that could cause those differences include, but are not limited to:
 
   
the volatility of the semiconductor industry and the market for
end-user
applications for semiconductor products;
 
   
overcapacity in the semiconductor assembly and testing markets;
 
   
the increased competition from other companies and our ability to retain and increase our market share;
 
   
our ability to successfully develop new technologies and remain a technological leader;
 
   
our ability to maintain control over capacity expansion and facility modifications;
 
   
our ability to generate growth or profitable growth;
 
   
our ability to hire and retain qualified personnel;
 
   
our ability to acquire required equipment and supplies to meet customer demand;
 
   
our ability to raise debt or equity financing as required to meet certain existing obligations;
 
   
our reliance on the business and financial condition of certain major customers;
 
   
the success of any of our future acquisitions, investments or joint ventures;
 
   
the outbreak of contagious disease and occurrence of earthquakes, typhoons and other natural disasters, as well as industrial accidents;
 
   
the political stability of the regions in which we conduct operations;
 
   
general local and global economic and financial conditions;
 
   
the potential impact of the Coronavirus Disease 2019
(“COVID-19”)
pandemic on our operations or the operations of our supply chain or our customers; and
 
   
other factors set forth under the heading “Item 3. Key Information—Risk Factors” of this Annual Report on Form
20-F.
The factors identified above are believed to be important factors (but not necessarily all of the important factors) that could cause actual results to differ materially from those expressed in any forward-looking statement made by us. Other factors not discussed herein could also have material adverse effects on us. All forward-looking statements included in this Annual Report on Form
20-F
are expressly qualified in their entirety by the foregoing cautionary statements. We undertake no obligation to update any forward-looking statement (or its associated cautionary language), whether as a result of new information or future events.
Forward-looking statements include, but are not limited to, statements regarding our strategy and future plans, future business condition and financial results, our capital expenditure plans, our capacity expansion plans, our investments in Mainland China, technological upgrades, investment in research and development, future market demand, future regulatory or other developments in our industry. Please see “Item 3. Key Information—Risk Factors” for a further discussion of certain factors that may cause actual results to differ materially from those indicated by our forward-looking statements.
 
1

PART I
 
Item 1.
Identity of Directors, Senior Management and Advisers
Not applicable.
 
Item 2.
Offer Statistics and Expected Timetable
Not applicable.
 
Item 3.
Key Information
Exchange Rates
References to “US$” and “US dollars” are to United States dollars and references to “NT$” and “NT dollars” are to New Taiwan dollars. This Annual Report on Form
20-F
contains translations of certain NT dollar amounts into US dollars at specified rates solely for the convenience of the reader. Unless otherwise noted, all translations from NT dollars to US dollars and from US dollars to NT dollars were made at the noon buying rate in the City of New York for cable transfers in NT dollars per US dollar as certified for customs purposes by the Federal Reserve Bank of New York as of December 30, 2021, which was NT$27.74 to US$1.00. We make no representation that the NT dollar or US dollar amounts referred to in this Annual Report on Form
20-F
could have been or could be converted into US dollars or NT dollars, as the case may be, at any particular rate or at all.
Capitalization and Indebtedness
Not applicable.
Reasons for the Offer and Use of Proceeds
Not applicable.
Risk Factors
Risks Relating to Economic Conditions and the Financial Markets
Global credit and financial markets disruptions could materially and adversely affect our business and results of operations.
Disruptions in global credit, financial markets, trade tensions and
COVID-19
may occur that causes diminished liquidity and limited availability of credit, reduced consumer confidence, reduced economic growth, increased unemployment rates and uncertainty about economic stability. Limited availability of credit in financial markets may lead consumers and businesses to postpone spending. This in turn may cause our customers to cancel, decrease or delay their existing and future orders with us. Particularly, the economics uncertainty caused by trade tensions and
COVID-19
will impact the end product market demand. It directly affects the inventory elimination of our customers. Financial difficulties experienced by our customers or suppliers as a result of these conditions could lead to production delays and delays or defaults in payment of accounts receivable. Continuing credit markets disruption restricts our access to capital and limits our ability to fund operations or to refinance maturing obligations as they become due through additional borrowing or other sources of financing. We are not able to predict the occurrence, frequency, duration or extent of disruptions in global credit and financial markets, or when the trade tensions could be settled down. These conditions increase the difficulty of accurately forecasting and planning our business activities. If these conditions and uncertainties by
COVID-19
occur or continue, or if credit and financial markets and confidence in economic conditions deteriorate, our business and results of operations could be materially and adversely affected.
Risks Relating to Our Industry
Because we depend on the highly cyclical semiconductor industry, which is characterized by significant and sometimes prolonged downturns from time to time, our revenue and earnings may fluctuate significantly, which in turn could adversely affect our results of operations and could cause the market price of our common shares or of our ADSs to decline.
Because our business is, and will continue to be, dependent on the requirements of semiconductor companies for independent assembly and testing services, any downturn in the highly cyclical semiconductor industry may reduce demand for our services and adversely affect our results of operations. All of our customers operate in this industry and variations in order levels and in service fee from our customers may result in volatility in our revenue and earnings. For instance, during periods of decreased demand for assembled semiconductors, some of our customers may simplify, delay or forego final testing of certain types of semiconductors, such as dynamic random access memory or DRAM and NAND Flash, which in turn may result in reduced demand for our services, adversely affecting our results of operations. From time to time, the semiconductor industry has experienced significant, and sometimes prolonged, downturns which have adversely affected our results of operations. We cannot give any assurances that there will not be any downturn in the future or that any future downturn will not materially and adversely affect our results of operations.
 
2

Any deterioration in the market for
end-user
applications for semiconductor products would reduce demand for our services and may result in a decrease in our earnings.
Market conditions in the semiconductor industry track, to a large degree, those for their
end-user
applications. Any deterioration in the market conditions for the
end-user
applications of semiconductors we test and assemble could reduce demand for our services and, in turn, could materially adversely affect our financial condition and results of operations. Our revenue is largely attributable to fees derived from testing and assembling semiconductors for use in personal computers, communications equipment, consumer electronic products and display applications. A significant decrease in demand for products in these markets could put pricing pressure on our assembly and testing services and negatively affect our revenue and earnings. The LCD driver market often aligns with broader economic trend, we cannot give any assurances that there will not be any downturn in the future or that any future downturn will not affect our results of operations. Any significant decrease in demand for
end-user
applications of semiconductors will negatively affect our revenue and earnings.
A decline in average selling prices for our services could result in a decrease in our earnings.
Historically, prices for our assembly and testing services in relation to any given semiconductor tend to decline over the course of its product and technology life cycle. See also “— A decrease in market demand for LCD, OLED and other display panel driver semiconductors may adversely affect our capacity utilization rates and thereby negatively affect our profitability”. If we cannot reduce the cost of our assembly and testing services, or introduce higher-margin assembly and testing services for new package types, to offset the decrease in average selling prices for our services, our earnings could decrease.
A reversal or slowdown in the outsourcing trend for semiconductor assembly and testing services could reduce our profitability.
Integrated device manufacturers, or IDMs, continue to increasingly outsource stages of the semiconductor production process, including assembly and testing, to independent companies like us to shorten production cycles. In addition, the availability of advanced independent semiconductor manufacturing services has also enabled the growth of
so-called
“fabless” semiconductor companies that focus exclusively on design and marketing and outsource their manufacturing, assembly and testing requirements to independent companies. A substantial portion of our revenue is indirectly generated from providing semiconductor assembly and testing services to these IDMs and fabless companies. We cannot assure you that these companies will continue to outsource their assembly and testing requirements to independent companies like us. A reversal of, or a slowdown in, this outsourcing trend could result in reduced demand for our services, which in turn could reduce our profitability.
Risks Relating to Our Business
If we are unable to compete effectively in the highly competitive semiconductor assembly and testing markets, we may lose customers and our income may decline.
The semiconductor assembly and testing markets are very competitive. We face competition from a number of IDMs with
in-house
assembly and testing capabilities and other independent semiconductor assembly and testing companies. Our competitors may have access to more advanced technologies and greater financial and other resources than we do. Many of our competitors have shown a willingness to reduce prices quickly and sharply in the past to maintain capacity utilization in their facilities during periods of reduced demand. In addition, an increasing number of our competitors conduct their operations in lower cost centers in Asia such as Mainland China. Any renewed or continued erosion in the prices or demand for our assembly and testing services as a result of increased competition could adversely affect our profits.
We are highly dependent on the market for memory products. A downturn in market prices for these products could significantly reduce our revenue and profit.
A significant portion of our revenue is derived from testing and assembling memory semiconductors. In the past, our service fees for testing and assembling memory semiconductors were sharply reduced in tandem with the decrease in the average selling price of DRAM and NAND Flash in the semiconductor industry. Oversupply of DRAM or NAND Flash products and weak demand in the DRAM or NAND Flash market may result in significant reductions in the price of DRAM or NAND Flash products, which in turn may drive down the average prices for our assembly and testing services for DRAM and NAND Flash products and further reduce our revenue and profit. We cannot assure you that there will not be further downturns in DRAM or NAND Flash prices in the future.
 
3

A decrease in market demand for LCD, OLED and other display panel driver semiconductors may adversely affect our capacity utilization rates and thereby negatively affect our profitability.
Our assembly and testing services for LCD, OLED and other display panel driver semiconductors generated revenue of NT$6,922 million, NT$7,023 million and NT$8,211 million (US$296 million) in 2019, 2020 and 2021, respectively. Including gold bump, the revenue of LCD, OLED and other display panel driver semiconductors accounted for around 47% in 2021. We invested NT$3,078 million, NT$2,143 million and NT$2,749 million (US$99 million) in 2019, 2020 and 2021, respectively, on equipment for
chip-on-film,
or COF and
chip-on-glass,
or COG, technologies, which are used in assembly and testing services for LCD, OLED and other display panel driver semiconductors. Most of this equipment may not be used for technologies other than COF or COG. The market demand for LCD, OLED and other display panel driver semiconductors increased in 2018 particularly the wafer test for TDDI in the second half of 2020. Any significant decrease in demand for these products and our related services would significantly impair our capacity utilization rates. That may result in our inability to generate sufficient revenue to cover the significant depreciation expenses for the equipment used in testing and assembling LCD, OLED and other display panel driver semiconductors, thereby negatively affecting our profitability. See also “—Because of our high fixed costs, if we are unable to achieve relatively high capacity utilization rates, our earnings and profitability may be adversely affected”.
Our significant amount of indebtedness and interest expense will limit our cash flow and could adversely affect our operations.
We have a significant level of debt and interest expense. As of December 31, 2021, we had approximately NT$9,413 million (US$339 million) outstanding long-term indebtedness. Our long-term indebtedness as of December 31, 2021, represented bank loans with an interest rate between 0.45% to 1.7895%. As of December 31, 2021, NT$7,654 million (US$276 million) of our indebtedness was secured by collateral comprised of our assets.
Our significant indebtedness poses risks to our business, including the risks that:
 
   
we may have to use a substantial portion of our consolidated cash flow from operations to pay principal and interest on our debt, thereby reducing the funds available for working capital, capital expenditures, acquisitions and other general corporate purposes;
 
   
insufficient cash flow from operations may force us to sell assets, or seek additional capital, which we may be unable to do at all or on terms favorable to us;
 
   
our ability to sell assets or seek additional capital may be adversely affected by security interests in our assets granted to our lenders as collateral; and
 
   
our level of indebtedness may make us more vulnerable to economic or industry downturns.
For additional information on our indebtedness, see “Item 5. Operating and Financial Review and Prospects—Liquidity and Capital Resources”.
Our results of operations may fluctuate significantly and may cause the market price of our common shares or of our ADSs to be volatile.
Our results of operations have varied significantly from period to period and may continue to vary in the future. Among the more important factors affecting our quarterly and annual results of operations are the following:
 
   
our ability to accurately predict customer demand, as we must commit significant capital expenditures in anticipation of future orders;
 
   
our ability to quickly adjust to unanticipated declines or shortfalls in demand and market prices for our assembly and testing services, due to our high percentage of fixed costs;
 
   
changes in prices for our assembly and testing services;
 
   
volume of orders relative to our assembly and testing capacity;
 
   
capital expenditures and production uncertainties relating to the
roll-out
of new assembly and testing services;
 
   
our ability to obtain adequate assembly and testing equipment on a timely basis;
 
   
changes in costs and availability of raw materials, equipment and labor;
 
   
changes in our product mix; and
 
   
earthquakes, global new virus epidemic and other natural disasters, as well as industrial accidents.
 
4

Because of the factors listed above, our future results of operations or growth rates may be below the expectations of research analysts and investors. If so, the market price of our common shares or of our ADSs, and the market value of your investment, may fall.
We rely on key customers for a substantial portion of our revenue and a loss of, or deterioration of the business from, or delayed payment by, any one of these customers could result in decreased revenue and materially adversely affect our results of operations and financial condition.
We rely on a small group of customers for a substantial portion of our business. In 2021, our top five customers collectively accounted for 57% of our revenue. As part of our strategy, we have been focusing on sales to key customers through long-term service agreements. We also focus on our business with smaller customers and customers who do not place orders on a regular basis. We expect that we will continue to rely on a relatively limited number of customers for a significant portion of our revenue. Any adverse development in our key customers’ operations, competitive position or customer base could materially reduce our revenue and materially adversely affect our business and profitability.
Since semiconductor companies generally rely on service providers with whom they have established relationships to meet their assembly and testing needs for their applications and new customers usually require us to pass a lengthy and rigorous qualification process, if we lose any of our key customers, we may not be able to replace them in a timely manner. We cannot assure you that receivable collection difficulties experienced by us will not occur in the future. If any of our key customers reduces or cancels its orders or terminates existing contractual arrangements, and if we are unable to attract new customers and establish new contractual arrangements with existing or new customers, our revenue could be reduced and our business and results of operations may be materially adversely affected.
Because of our high fixed costs, if we are unable to achieve relatively high capacity utilization rates, our earnings and profitability may be adversely affected.
Our operations are characterized by a high proportion of fixed costs. For memory and logic/mixed-signal semiconductor testing services, our fixed costs represented 51%, 50% and 49% of our total cost of revenue in 2019, 2020 and 2021, respectively. For memory and logic/mixed-signal semiconductor assembly services, our fixed costs represented 22%, 20% and 19% of our total cost of revenue in 2019, 2020 and 2021, respectively. For LCD, OLED and other display panel driver semiconductor assembly and testing services, our fixed costs represented 53%, 57% and 59% of our total cost of revenue in 2019, 2020 and 2021, respectively. For bumping services, our fixed costs represented 24%, 20% and 19% of our total cost of revenue in 2019, 2020 and 2021, respectively. Our profitability depends in part not only on absolute pricing levels for our services, but also on the utilization rates for our assembly and testing equipment, commonly referred to as “capacity utilization rates”. Increases or decreases in our capacity utilization rates can significantly affect our gross margins as unit costs generally decrease as the fixed costs are allocated over a larger number of units. In the past, our capacity utilization rates have fluctuated significantly as a result of the fluctuations in the market demand for semiconductors. If we fail to increase or maintain our capacity utilization rates, our earnings and profitability may be adversely affected. In addition, the long-term assembly and testing services agreements we entered with certain customers may require us to incur significant capital expenditures. If we are unable to achieve high capacity utilization rates for the equipment purchased pursuant to these agreements, our gross margins may be materially and adversely affected.
The assembly and testing process is complex and our production yields and customer relationships may suffer as a result of defects or malfunctions in our testing and assembly equipment and the introduction of new packages.
Semiconductor testing and assembly are complex processes that require significant technological and process expertise. Semiconductor testing involves sophisticated test equipment and computer software. We develop computer software to test our customers’ semiconductors. We also develop conversion software programs that enable us to test semiconductors on different types of testers. Similar to most software programs, these software programs are complex and may contain programming errors or bugs. In addition, the testing process is subject to human error by our employees who operate our test equipment and related software. Any significant defect in our testing or conversion software, malfunction in our test equipment or human error could reduce our production yields and damage our customer relationships.
The assembly process involves a number of steps, each of which must be completed with precision. Defective packages primarily result from:
 
   
contaminants in the manufacturing environment;
 
   
human error;
 
   
equipment malfunction;
 
5

   
defective raw materials; or
 
   
defective plating services.
These and other factors have, from time to time, contributed to lower production yields. They may do so in the future, particularly as we expand our capacity or change our processing steps. In addition, to be competitive, we must continue to expand our offering of packages. Our production yields on new packages typically are significantly lower than our production yields on our more established packages. Our failure to maintain high standards or acceptable production yields, if significant and prolonged, could result in a loss of customers, increased costs of production, delays, substantial amounts of returned goods and related claims by customers. Further, to the extent our customers have set target production yields, we may be required to compensate our customers in a
pre-agreed
manner. Any of these problems could materially adversely affect our business reputation and result in reduced revenue and profitability.
Because of the highly cyclical nature of our industry, our capital requirements are difficult to plan. If we cannot obtain additional capital when we need it, we may not be able to maintain or increase our current growth rate and our profits will suffer.
As our industry is highly cyclical and rapidly changing, our capital requirements are difficult to plan. To remain competitive, we may need capital to fund the expansion of our facilities as well as to fund our equipment purchases and research and development activities. To meet our liquidity, capital spending and other capital needs, we have taken and plan to take certain measures to generate additional working capital and to save cash. See “Item 5. Operating and Financial Review and Prospects—Liquidity and Capital Resources”. We cannot assure you that these plans and measures will be implemented or will provide sufficient sources of capital.
In addition, future capacity expansions or market or other developments may require additional funding. Our ability to obtain external financing in the future depends on a number of factors, many of which are beyond our control. They include:
 
   
our future financial condition, results of operations and cash flows;
 
   
general market conditions for financing activities by semiconductor assembly and testing companies; and
 
   
economic, political and other conditions in Taiwan and elsewhere.
If we are unable to obtain funding in a timely manner or on acceptable terms, our growth prospects and potential future profitability will suffer.
Disputes over intellectual property rights could be costly, deprive us of technologies necessary for us to stay competitive, render us unable to provide some of our services and reduce our opportunities to generate revenue.
Our ability to compete successfully and achieve future growth will depend, in part, on our ability to protect our proprietary technologies and to secure, on commercially acceptable terms, critical technologies that we do not own. We cannot assure you that we will be able to independently develop, or secure from any third party, the technologies required for our assembly and testing services. Our failure to successfully obtain these technologies may seriously harm our competitive position and render us unable to provide some of our services.
Our ability to compete successfully also depends on our ability to operate without infringing upon the proprietary rights of others. The semiconductor assembly and testing industry is characterized by frequent litigation regarding patent and other intellectual property rights. We may incur legal liabilities if we infringe upon the intellectual property or other proprietary rights of others. We are not able to ascertain what patent applications have been filed in the United States or elsewhere, however, until they are granted. If any third party succeeds in its intellectual property infringement claims against us or our customers, we could be required to:
 
   
discontinue using the disputed process technologies, which would prevent us from offering some of our assembly and testing services;
 
   
pay substantial monetary damages;
 
   
develop
non-infringing
technologies, which may not be feasible; or
 
   
acquire licenses to the infringed technologies, which may not be available on commercially reasonable terms, if at all.
Any one of these developments could impose substantial financial and administrative burdens on us and hinder our business. We are, from time to time, involved in litigation in respect of intellectual property rights. Any litigation, whether as plaintiff or defendant, is costly and diverts our resources. If we fail to obtain necessary licenses on commercially reasonable terms or if litigation, regardless of the outcome, relating to patent infringement or other intellectual property matters occurs, our costs could be substantially increased to impact our margins. Any such litigation could also prevent us from testing and assembling particular products or using particular technologies, which could reduce our opportunities to generate revenue.
 
6

If we are unable to obtain raw materials and other necessary inputs from our suppliers in a timely and cost-effective manner, our production schedules would be delayed and we may lose customers and growth opportunities and become less profitable.
Our operations require us to obtain sufficient quantities of raw materials at acceptable prices in a timely and cost-effective manner. We source most of our raw materials, including critical materials like leadframes, organic substrates, epoxy, gold wire and molding compound for assembly, and tapes for COF, from a limited group of suppliers. We purchase all of our materials on a purchase order basis and have no long-term contracts with any of our suppliers. From time to time, suppliers have extended lead times, increased the price or limited the supply of required materials to us because of market shortages. Consequently, we may, from time to time, experience difficulty in obtaining sufficient quantities of raw materials on a timely basis. In addition, from time to time, we may reject materials that do not meet our specifications, resulting in declines in output or yield. Although we typically maintain at least two suppliers for each key raw material, we cannot assure you that we will be able to obtain sufficient quantities of raw materials and other supplies of an acceptable quality in the future. It usually takes from three to six months to switch from one supplier to another, depending on the complexity of the raw material. If we are unable to obtain raw materials and other necessary inputs in a timely and cost-effective manner, we may need to delay our production and delivery schedules, which may result in the loss of business and growth opportunities and could reduce our profitability.
If we are unable to obtain additional assembly and testing equipment or facilities in a timely manner and at a reasonable cost, we may be unable to fulfill our customers’ orders and may become less competitive and less profitable.
The semiconductor testing and assembly business is capital intensive and requires significant investment in expensive equipment manufactured by a limited number of suppliers. The market for semiconductor assembly and testing equipment is characterized, from time to time, by intense demand, limited supply and long delivery cycles. Our operations and expansion plans depend on our ability to obtain equipment from a limited number of suppliers in a timely and cost-effective manner. We have no binding supply agreements with any of our suppliers and we acquire our assembly and testing equipment on a purchase order basis, which exposes us to changing market conditions and other significant risks. Semiconductor assembly and testing also requires us to operate sizeable facilities. If we are unable to obtain equipment or facilities in a timely manner, we may be unable to fulfill our customers’ orders, which could negatively impact our financial condition and results of operations as well as our growth prospects. Currently, we do not have any long-term service agreements that require our commitment to acquire additional assembly and testing equipment or facilities. We cannot assure you, however, that such commitment will not be made in the future. See “Item 4. Information on the Company—Customers”.
If we are unable to manage the expansion of our operations and resources effectively, our growth prospects may be limited and our future profitability may be reduced.
We expect to continue to expand the operations and to increase the number of employees. Rapid expansion puts a strain on our managerial, technical, financial, operational and other resources. As a result of our expansion, we will need to implement additional operational and financial controls and hire and train additional personnel. We cannot assure you that we will be able to do so effectively in the future, and our failure to do so could jeopardize our expansion plans and seriously harm our operations.
Laws of the Republic of China may be less protective of shareholder rights than laws of the United States or other jurisdictions.
Our corporate affairs are governed by our articles of incorporation and laws governing corporations incorporated in the Republic of China (“ROC”). The rights of our shareholders to bring shareholders’ suits against us or our board of directors under the ROC law are more limited than those of the shareholders of U.S. corporations. For example, the ROC Company Act requires that a shareholder that continuously holds at least 1% of our issued and outstanding shares for at least 6 months may request our audit committee to institute an action against a director on the Company’s behalf. In addition, the controlling shareholders of U.S. corporations owe fiduciary duties to minority shareholders, while controlling shareholders in ROC corporations do not. Therefore, our shareholders may be less able under the ROC law than they would be under the laws of the United States or other jurisdictions to protect their interests in connection with actions by our management, members of our board of directors or our controlling shareholder.
It may be difficult to bring and enforce lawsuits against us in the United States.
We are incorporated in the ROC and a majority of our directors and most of our officers are not residents of the United States. A substantial portion of our assets is located outside the United States. As a result, it may be difficult for our shareholders to serve notice of a lawsuit on us or our directors and officers within the United States. Because most of our assets are located outside the United States, it may be difficult for our shareholders to enforce in the United States judgments of United States courts. Any United States judgments obtained against us will not be enforced by ROC courts if any of the following situations shall apply to such final judgment:
 
   
the court rendering the judgment does not have jurisdiction over the subject matter under the ROC law;
 
7

   
the judgment was rendered by default, except where the summons or order necessary for the commencement of the action was duly served on us within the jurisdiction of the court rendering the judgment within a reasonable period of time and in accordance with the laws and regulations of such jurisdiction, or with judicial assistance of the ROC;
 
   
the judgment or the court procedures resulting in the judgment are contrary to the public order or good morals of the ROC; or
 
   
the judgments of ROC courts are not recognized and enforceable in the jurisdiction of the court rendering the judgment on a reciprocal basis.
Investor confidence and the market price of our common shares or ADSs may be adversely impacted if we are unable to maintain effective Internal Control over Financial Reporting in accordance with Section 404 of the Sarbanes-Oxley Act of 2002.
We are required to comply with the ROC and US securities laws and regulations in connection with internal controls. As a public company in the United States, our management is required to assess the effectiveness of our internal control over financial reporting using the criteria established in Internal Control – Integrated Framework (2013) issued by Committee of Sponsoring Organization of the Treadway Commission (COSO), as required by Section 404 of the Sarbanes-Oxley Act of 2002. We carried out an evaluation, under the supervision and with the participation of management, including our President, the principal executive officer and Vice President of the Finance and Accounting Management Center, the principal financial officer of the effectiveness of the design and operation of our internal controls over financial reporting as of December 31, 2021, and concluded those internal controls over financial reporting were effective as of that date. See “Item 15. Controls and Procedures” for more information. Moreover, even if our management concludes that our internal controls over our financial reporting are effective, our independent public registered accounting firm may disagree. If our independent public registered accounting firm is not satisfied with our internal controls over our financial reporting or the level at which our controls are documented, designed, operated or reviewed, or if the independent public registered accounting firm interprets the requirements, rules or regulations differently from us, it may decline to attest our effectiveness of internal controls over financial reporting or may issue an adverse opinion in the future. Any of these possible outcomes could result in an adverse reaction in the financial marketplace due to a loss of investor confidence in the reliability of our consolidated financial statements, which ultimately could negatively impact the market prices of our common shares or ADSs.
Any environmental claims or failure to comply with any present or future environmental regulations, or any new environmental regulations, may require us to spend additional funds, may impose significant liability on us for present, past or future actions, and may dramatically increase the cost of providing our services to our customers.
We are subject to various laws and regulations relating to the use, storage, discharge and disposal of chemical
by-products
of, and water used in, our assembly and gold bumping processes. Although we have not suffered material environmental claims in the past, a failure or a claim that we have failed to comply with any present or future regulations could result in the assessment of damages or imposition of fines against us, suspension of production or a cessation of our operations or negative publicity. New regulations could require us to acquire costly equipment or to incur other significant expenses. Any failure on our part to control the use of, or adequately restrict the discharge of, hazardous substances could subject us to future liabilities that may materially reduce our earnings.
Fluctuations in exchange rates could result in foreign exchange losses.
Currently, we are nearly half of revenue denominated in US dollars. Our cost of revenue and operating expenses, on the other hand, are incurred in several currencies, including NT dollars, Japanese yen and US dollars. In addition, a substantial portion of our capital expenditures, primarily for the purchase of LCD, OLED and other display panel driver semiconductor, assembly and testing equipment, has been, and is expected to continue to be, denominated in Japanese yen with much of the remainder in US dollars. We also have debt denominated in NT dollars, Japanese yen, and US dollars. Fluctuations in exchange rates, primarily among the US dollar, the NT dollar and the Japanese yen, will affect our costs and operating margins in NT dollar terms. In addition, these fluctuations could result in exchange losses and increased costs in NT dollar terms. Despite selective hedging and other techniques implemented by us, fluctuations in exchange rates have affected, and may continue to affect, our financial condition and results of operations.
 
8

We may not be successful in our acquisitions, investments, joint ventures and dispositions, and may therefore be unable to implement fully our business strategy.
To implement our business strategy requires us to enter into acquisition, investment, joint venture and disposition transactions. These transactions may not be successful to maintain or grow our business. On November 30, 2016, the Company and Tsinghua Unigroup Ltd. (“Tsinghua Unigroup”) mutually agreed to form a joint-venture. Under the joint-venture, ChipMOS TECHNOLOGIES (BVI) LTD. (“ChipMOS BVI”), a wholly-owned subsidiary of the Company, would sell, for the aggregate purchase price of approximately RMB 484 million, 54.98% of the equity interests of its wholly-owned subsidiary, Unimos Shanghai, to strategic investors, including Tibet Unigroup Guowei Investment Co., Ltd. (“Unigroup Guowei”), a subsidiary of Tsinghua Unigroup, which would hold 48% equity interests of Unimos Shanghai, and the other strategic investors, including a limited partnership owned by Unimos Shanghai’s employees, would own 6.98% equity interest of Unimos Shanghai. The transaction was completed in March 2017. Unimos Shanghai is no longer the subsidiary of the Company following the completion of equity interest transfer. Please see “Item 4. Information on the Company—Agreements with Tsinghua Unigroup Ltd.” for additional information.
The success of our acquisitions, investments, joint ventures and dispositions depends on a number of factors, including:
 
   
our ability to identify suitable investment, acquisition, joint venture or disposition opportunities;
 
   
our ability to reach an agreement for an acquisition, investment, joint venture or disposition opportunity on terms that are satisfactory to us or at all;
 
   
the extent to which we are able to exercise control over the acquired or joint venture company;
 
   
our ability to align the economic, business or other strategic objectives and goals of the acquired company with those of our company; and
 
   
our ability to successfully integrate the acquired or joint venture company or business with our company.
If we are unsuccessful in our acquisitions, investments, joint ventures and dispositions, we may not be able to implement fully our business strategy to maintain or grow our business.
We rely on key personnel, and our revenue could decrease and our costs could increase if we lose their services.
We depend on the continued service of our executive officers and skilled engineering, technical and other personnel. We will also be required to hire a substantially greater number of skilled employees in connection with our expansion plans. In particular, we depend on a number of skilled employees in connection with our LCD, OLED and other display panel driver semiconductor assembly and testing services, and the competition for such employees in Taiwan is intense. We may not be able to either retain our present personnel or attract additional qualified personnel as and when needed. Moreover, we do not carry key person insurance for any of our executive officers nor do we have employment contracts with any of our executive officers or employees, and, as a result, none of our executive officers or employees is bound by any
non-competition
agreement. If we lose any of our key personnel, it could be very difficult to find and integrate replacement personnel, which could affect our ability to provide our services, resulting in reduced revenue and earnings. In addition, we may need to increase employee compensation levels in order to retain our existing officers and employees and to attract additional personnel. As of March 31, 2022, 20% of the workforces at our facilities are foreign workers employed by us under work permits that are subject to government regulations on renewal and other terms. Consequently, if the regulations in Taiwan relating to the employment of foreign workers were to become significantly more restrictive or if we are otherwise unable to attract or retain these workers at reasonable cost, we may be unable to maintain or increase our level of services and may suffer reduced revenue and earnings.
If our security measures are breached and unauthorized access is obtained to our information technology systems, we may lose proprietary data.
Our security measures may be breached as a result of third-party action, including computer hackers, employees error, malfeasance or otherwise, and result in unauthorized access to our customers’ data or our data, including our intellectual property and other confidential business information, or our information technology systems. Because the techniques used to obtain unauthorized access, or to sabotage systems, change frequently, we may be unable to anticipate these techniques or to implement adequate preventative measures. Any security breach could result in disclosure of our trade secrets, confidential customer, supplier or employee data, which could result in legal liability, harm to our reputation and otherwise harm our business.
 
9

Risks Relating to Countries in Which We Conduct Operations
The ROC laws and regulations limit or prohibit certain technology cooperation between ROC persons or entities with PRC persons or entities, and our current technology transfer arrangements between the Company and Unimos Shanghai may be found to be in violation of any such limitation or prohibition, which may result in a fine of between NT$50 thousand and NT$25 million and the termination of such technology transfer arrangements and therefore have a material adverse effect on the operations of Unimos Shanghai and our financial condition and results of operations.
The ROC laws and regulations previously prohibited any transfer of semiconductor assembly and testing technologies to any person or entity located in Mainland China, except for transfers involving certain
low-end
semiconductor assembly and testing technologies, such as conventional wire bond assembly technology, if certain requirements are met. The ROC Ministry of Economic Affairs (“MOEA”) has the ultimate administrative authority in interpreting such laws and regulations. In February 2010, these restrictions have been relaxed, so that ROC entities may transfer semiconductor assembly and testing technologies to any person or entity located in Mainland China after they have obtained approval from the Investment Commission of the ROC Ministry of Economic Affairs (“MOEAIC”). Under a technology transfer agreement, dated August 1, 2002, ChipMOS Bermuda, the parent company of the Company before its merger with and into the Company effective on October 31, 2016, licensed to Unimos Shanghai (formerly known as ChipMOS TECHNOLOGIES (Shanghai) LTD.) certain assembly and test-related technologies that were then controlled by ChipMOS Bermuda, which included technologies that were licensed to ChipMOS Bermuda by the Company. ChipMOS Bermuda continued to license such technologies to Unimos Shanghai pursuant to a technology transfer agreement dated October 3, 2011 with effective date of August 1, 2012. ChipMOS Bermuda also provided Unimos Shanghai with technical support and consulting services under this agreement. Following the merger of ChipMOS Bermuda and the Company which was effective on October 31, 2016 (the “Merger”), the Company is the surviving company to provide Unimos Shanghai with technical support and consulting services. On May 27, 2016, the Company and Unimos Shanghai executed another technology transfer and license agreement under which the Company licensed Unimos Shanghai certain technologies relating to LCD driver IC assembly and testing and wafer bumping. The Company and Unimos Shanghai further executed the first addendum and the second addendum to such technology transfer and license agreement on August 5, 2016 and January 19, 2017, respectively, to revise the term, and license fee and running royalty of such license arrangement. On April 1, 2020, the Company and Unimos Shanghai mutually agreed to terminate the technology transfer agreement.
Our ROC special counsel, Lee and Li, has advised that since our technology transfer arrangements as described above have been approved by the MOEAIC, they are in compliance with all applicable ROC laws and regulations. However, substantial uncertainties remain regarding the interpretation and application of those laws and regulations. Accordingly, we cannot assure you that ROC regulatory authorities will not take a view contrary to the opinion of our ROC special counsel. If we were determined to be in violation of applicable ROC laws and regulations governing technology cooperation with PRC persons and entities, we may be subject to a fine of between NT$50 thousand and NT$25 million and may be ordered by the MOEAIC to terminate or rectify such activity within a specified period of time.
The operations we conduct through our affiliated companies that we do not fully own may be limited by legal duties owed to other shareholders of such companies.
Certain of our operations are conducted through companies that we do not fully own. For example, as of March 31, 2017, the Company owned 45.02% equity interests of Unimos Shanghai through its wholly-owned subsidiary ChipMOS BVI. We also conduct other activities through our affiliated entities. See also “—Risks Relating to Our Common Shares or ADSs—The Company’s ability to maintain its listing and trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market is dependent on factors outside of the Company’s control and satisfaction of stock exchange requirements. The Company may not be able to overcome such factors that disrupt its trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market or satisfy other eligibility requirements that may be required of it in the future” and “Item 7. Major Shareholders and Related Party Transactions—Related Party Transactions”.
In accordance with the various laws of the relevant jurisdictions in which our subsidiaries and affiliates are organized, each of our subsidiaries and affiliates and their respective directors owe various duties to their respective shareholders. As a result, the actions we wish our subsidiaries or affiliates to take could be in conflict with their or their directors’ legal duties owed to their other shareholders. When those conflicts arise, our ability to cause our subsidiaries or affiliates to take the action that we desire may be limited.
Any future outbreak of health epidemics and outbreaks of contagious diseases may materially affect our operations and business.
Any future outbreak of contagious diseases, such as avian influenza virus subtypes H5N1, H9N2 and H7N9 and swine influenza virus subtypes H1N1 and H3N2, New Influenza A or more commonly known as the “bird flu” and “swine flu”, Severe Acute Respiratory Syndrome (“SARS”), or Middle East respiratory syndrome coronavirus
(“MERS-CoV”),
for which there is inadequate treatment or no known cure or vaccine, may potentially result in a quarantine of infected employees and related persons, and adversely affect our operations at one or more of our facilities or the operations of our customers or suppliers.
 
10

The
COVID-19
pandemic persists as of the date hereof. Many countries have taken extreme measures to contain the transmission, including total or partial lockdown of the infected areas, travel bans, closures of factories, among others. Governments around the world implemented enhanced screenings, quarantine requirements, and travel restrictions in connection with
the COVID-19
pandemic. Many suppliers in the semi-conductor industry have had work forces disrupted due to the quarantine requirements and restricted travel. The extent of the continuing impact
of COVID-19
on our operational and financial performance will depend on future developments, including, but not limited to, the travel advisories and restrictions and the speed of vaccination program in key markets, all of which are highly uncertain and cannot be predicted. Preventing the effects from and responding to the market disruption of this or any other public health threat, related or otherwise, may further increase costs of our business and may have a material adverse effect on our business, financial condition, and results of operations. As a result, may incur expenses or delays relating to such events outside of our control, which could have a material adverse impact on our business, operating results and financial condition.
We cannot predict the impact that any further future outbreak of the aforementioned influenza viruses or other diseases could have on our business and results of operations. If any of our employees is suspected of having contracted any contagious disease, we may, under certain circumstances, be required to quarantine such employees and the affected areas of our premises. As a result, we may have to suspend part or all of our operations temporarily. In addition, any future outbreak may restrict the level of economic activity in affected regions, which may also adversely affect our businesses. As a result, there is no assurance that any future outbreak of contagious diseases would not have a material adverse effect on our business, financial condition and results of operations.
The
COVID-19
pandemic could adversely affect our business in a material way.
The
COVID-19
pandemic has resulted in significant governmental measures being implemented to control the spread of
COVID-19
and its variants, including, among others, restrictions on travel, manufacturing and the movement of employees in many regions of the world. Our principal executive offices and our assembly and testing facilities are located in Taiwan and we maintain sales and marketing offices in Taiwan, the United States and Mainland China. If the remote or work from home conditions in any of our offices continues for an extended period of time, we may experience delays in product development, a decreased ability to support our customers, and overall lack of productivity. Pandemics and epidemics such as the current
COVID-19
outbreak or other widespread public health problems could negatively impact our business. Our customers may also experience closures of their manufacturing facilities or inability to obtain other components, either of which could negatively impact demand for our solutions.
COVID-19
has negatively impacted the overall economy and, as a result of the foregoing, will potentially negatively impact our operating results for fiscal year 2022.
We face substantial political risk associated with doing business in the ROC, particularly due to the strained relations between the ROC and the PRC, which could negatively affect our business and the market price of our common shares or ADSs.
Our principal executive offices and our assembly and testing facilities are located in the ROC. As a result, our business, financial condition and results of operations and the market price of our common shares or ADSs may be affected by changes in the ROC governmental policies and the political relationship between the ROC and the PRC, as well as social instability and diplomatic and social developments in or affecting the ROC which are beyond our control. The ROC has a unique international political status. The PRC government regards Taiwan as a province and does not recognize the legitimacy of the ROC as an independent country. Although significant economic and cultural relations have been positively strengthened in recent years between the ROC and the PRC, relations have often been strained. In March 2005, the PRC government enacted the “Anti-Secession Law” codifying its policy of retaining the right to use military force to gain control over Taiwan, particularly under what it considers as highly provocative circumstances, such as a declaration of independence by Taiwan or the refusal by the ROC to accept the PRC’s stated “One China” principle.
In 2016 and 2020, Tsai Ing-wen of the
pro-independence
Democratic Progressive Party (“DPP”) won Taiwan’s Presidential Elections and the DPP gained a majority in Taiwan’s Legislative Yuan (the unicameral legislature of the ROC) since 2016. President Tsai and the DPP had stressed on how they are keen to maintain the status quo with the PRC. However, the PRC has since ramped up pressures through various means on the Tsai administration for her refusal to accept the “One China” principle. It is uncertain how these different measures may affect our financial condition and results of operations, and there is no assurance that any future measures imposed by the PRC or ROC would not adversely affect our financial condition or results of operations.
Past developments related to the interaction between the ROC and the PRC have on occasion depressed the market prices of the securities of Taiwanese or Taiwan-related companies, including our own. We cannot assure you any contentious situations between the ROC and the PRC will resolve in maintaining the current status quo or remain peaceful. Relations between the ROC and the PRC and other factors affecting military, political or economic stability in Taiwan could have a material adverse effect on our financial condition and results of operations, as well as the market price and the liquidity of our common shares or ADSs.
 
11

The business and operations of our business associates and our own business operations are vulnerable to disruptions that may be caused by natural disasters and other events.
The frequency and severity of catastrophic events, including natural disasters and severe weather has been increasing, in part due to climate change or systemic regional geological changes that manifest in damaging earthquakes. ChipMOS has manufacturing and other operations in locations susceptible to natural disasters, such as flooding, earthquakes, tsunamis, typhoons, and droughts that may cause interruptions or shortages in the supply of utilities, such as water and electricity that could disrupt operations. In addition, ChipMOS’s suppliers and customers also have operations in such locations. We currently provide most of our testing services through our facilities in the Hsinchu Science Park and the Hsinchu Industrial Park in Taiwan, and all of our assembly services through our facility in the Southern Taiwan Science Park, which are susceptible to earthquakes, tsunamis, flooding, typhoons, and droughts from time to time that may cause shortages in electricity and water or interruptions to our operations. Significant damage or other impediments to these facilities as a result of natural disasters, industrial strikes or industrial accidents could significantly increase our operating costs.
The production facilities of many of our suppliers, customers and providers of complementary semiconductor manufacturing services, including foundries, are located in Taiwan. If our customers are adversely affected by natural disasters or other events occurring in or affecting these geographic areas, it could result in a decline in the demand for our assembly and testing services. If our suppliers and providers of complementary semiconductor manufacturing services are affected by such events, our production schedule could be halted or delayed. As a result, a major earthquake, other natural disaster, industrial strike, industrial accident or other disruptive event occurring in or affecting Taiwan could severely disrupt our normal operation of business and have a material adverse effect on our financial condition and results of operations.
ChipMOS has occasionally suffered power outages or surges in Taiwan caused by difficulties encountered by its electricity supplier, the Taiwan Power Company, or other power consumers on the same power grid, which have resulted in interruptions to our operations. Such shortages or interruptions in electricity supply could further be exacerbated by changes in the energy policy of the government which intends to make Taiwan a nuclear-free country. If we are unable to secure reliable and uninterrupted supply of electricity to power our manufacturing fabs within Taiwan, our ability to fill customers’ orders would be severely jeopardized. Also, in 2020 and 2021, Taiwan has faced one of the worst droughts in decades. Government imposes restrictions on the supply and usage of water by industrial companies like us as responses, it could disrupt our operations. We maintain a comprehensive risk management system dedicated to the safety of people, the conservation of natural resources, and the protection of property. In order to effectively handle emergencies and natural disasters, at each facility management has developed comprehensive plans and procedures that focus on risk prevention, emergency response, crisis management and business continuity. All ChipMOS manufacturing factories have been ISO 14001 certified (environmental management system) and OHSAS 18001 certified (occupational health and safety management system).
ChipMOS pays special attention to preparedness of emergency response to disasters, such as typhoons, floods and droughts caused by climate change, earthquakes and disruptions to water, electricity and other public utilities. We have established a company-wide taskforce dedicated to managing the risk of a water or electricity shortage that might arise due to climate change. Despite our preparedness, there is no assurance that any such natural disaster would not severely disrupt our normal operation of business and have a material adverse effect on our financial condition and results of operations.
Systemic political, economic and financial crises could negatively affect our business
In recent years, several major systemic political, economic and financial crises negatively affected global business, banking and financial sectors, including the semiconductor industry and markets.
Since 2018, there have been political and trade tensions among many of the world’s major economies. These tensions have resulted in the imposition of tariff,
non-tariff
trade barriers and sanctions, including export control restrictions and sanctions against certain countries and individual companies. These trade barriers and other measures have particularly impacted the semiconductor industry and related markets. Prolonged or increased use of trade barriers and such measures may result in a decrease in the growth of the global economy and the semiconductor industry, causing disturbance in global markets that often result in declines in electronic products sales from which we generate our income through our products and services. Also, any increase in the use of export control restrictions and sanctions to target certain countries and entities, any expansion of the extraterritorial jurisdiction of export control laws, or complete or partial ban on semiconductor products sales to certain entities could impact not only our ability to continue supplying products to those customers, but also our customers’ demand for our products, and could even lead to changes in semiconductor supply chains.
 
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Conversely, measures adopted by an affected country to counter the impacts of another country’s actions or regulations could lead to significant legal liability to multinational corporations including our own. For example, the PRC Ministry of Commerce promulgated the Blocking Statute and the Provisions on the Unreliable Entity List in January 2021 and September 2020, and in furtherance of that, the “Anti-Foreign Sanctions Law” was promulgated by the PRC government on June 10, 2021 to systematize the
ad hoc
sanctions imposed by the PRC government on foreign individuals and organizations that, among other matters, entitles Chinese entities incurring damages from a multinational’s compliance with foreign laws to seek civil remedies. The imposition of trade sanctions or other regulations or the loss of “normal trade relations” status with the PRC could significantly increase our production cost and harm our business. As of the date of this annual report, our current results of operations have not been materially affected by the expanded export control regulations or the novel rules or measures adopted to counteract them. Nevertheless, depending on future developments of global trade tensions, such regulations, rules, or measures may have an adverse effect on our business and operations, and we may incur significant legal liability and financial losses as a result.
Further, changes in PRC’s economic, political or social conditions or government policies could adversely impact our business and operations. Some of the governmental measures implemented by the Chinese government may help China achieve its carbon peaking and neutrality goals as well as energy and climate goals, but may have a negative effect on us or our suppliers or customers in China. For example, China has implemented the dual-control policy on energy consumption and intensity to reduce energy intensity and to limit total energy consumption and to accelerate the elimination of outdated and inefficient excess production capacity. Despite a policy tool implemented in 2016, on June 3 and August 12, 2021, the National Development and Reform Commission issued the quarterly reviews of the target achievement for the first time, with progress alerts upon provinces. On September 16, 2021, the policymaker released “The Scheme to Refine Dual-Control of Energy Intensity and Total Energy Consumption”, which clarified the overall arrangement, working principles, as well as tasks and measures of the dual control system, and drew a roadmap for the development of the dual control system. Just days after that, some provinces with “progress alerts” started to employ power rationing and production curbs. In the face of the current severe situation of dual-control of energy consumption and intensity, our suppliers or customers in China may be adversely affected. Consequently, our businesses, financial condition and results of operations may be materially and adversely affected.
Any future outbreak of radiation-related disease as a result of nuclear power plant reactors damage caused by the Great East Japan Earthquake of 2011 may materially adversely affect our operations and business.
The Great East Japan Earthquake of 2011 raises tremendous concerns about the possible effects of radiation emission from the damaged nuclear power plants. Japanese official authorities are working with experts in assessing the risk and determining the best courses of actions to implement to escape harmful radiation. The potential health effects due to exposure to harmful radiation may be temporary or permanent harmful effects in nature.
Multiple radioactive gases could possibly be emitted in a situation where uranium attains a “meltdown” state, which is a severe overheating of the core of a nuclear reactor, in which the core melts and radiation and heat are caused to escape. This would occur if the containment system partially or fully fails. The particles that are released with the gases due to the meltdown would be the spewed particles of
iodine-131,
strontium-90
and
cesium-137.
These might enter into a human by being swallowed, absorbed through the skin, or inhaled. Depending on the chemical characteristics of each of these and their predilection for certain body tissues, they could cause cancers of such organs as bones, soft tissues near bones, thyroid gland, and the bone marrow (typically known as leukemia).
Acute or very high level radiation exposure can cause a person to become very ill or to die quickly. Ionizing radiation, which is defined as high-energy particles or electromagnetic waves that can break chemical bonds, damage humans by disrupting cellular function, particularly in tissues with rapid growth and turnover of cells. Intense, high level and/or excessive radiation exposure may result in acute radiation syndrome whereby harmful effects to the human body may be evidenced by skin burns, internal organ deterioration, bleeding, vomiting, bone marrow distortion and deaths. If the radiation exposure is less intense and/or more prolonged at a lower level, then the central nervous system, kidneys, thyroid gland, and liver may be affected. Cancer is the most well-known effect, and may affect virtually any significantly exposed tissue.
Certain health effects due to exposure to harmful radiation does not have adequate treatment or known cure or vaccine, consequently, may potentially result in a quarantine of infected employees and related persons, and adversely affect our operations at one or more of our facilities or the operations of our customers or suppliers. We cannot predict the probability of any future outbreak of radiation related diseases as a possible result of nuclear power plants damage caused by the Great East Japan Earthquake of 2011 or the extent of the material adverse impact that this could have on our business and results of operations.
Risks Relating to Our Common Shares or ADSs
The Company’s ability to maintain its listing and trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market is dependent on factors outside of the Company’s control and satisfaction of stock exchange requirements. The Company may not be able to overcome such factors that disrupt its trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market or satisfy other eligibility requirements that may be required of it in the future.
 
13

The Company became listed and commenced trading its common shares on the main board of Taiwan Stock Exchange (“TWSE”) on April 11, 2014 and its ADSs on the NASDAQ Stock Market (“NASDAQ”) on November 1, 2016. For a TWSE-listed and NASDAQ-listed company to continue trading on the main board of TWSE and NASDAQ depends in part on market conditions and other factors that may not within the control of the Company. For these reasons there can be no assurance that the Company’s shares will continue to be listed or traded on the TWSE or ADSs will continue to be listed or traded on the NASDAQ.
The audit work on our PRC associate may not be inspected fully by the Public Company Accounting Oversight Board and, as such, our investors are deprived of the benefits of such inspection and our ADSs may be delisted or prohibited from trading.
Auditors of companies that are registered with the Securities and Exchange Commission (the “SEC”) and traded publicly in the United States, including our independent registered public accounting firm, must be registered with the Public Company Accounting Oversight Board (the “PCAOB”), and are subject to laws in the United States pursuant to which the PCAOB conducts regular inspections to assess their compliance with the relevant professional standards.
On March 24, 2021, the SEC adopted interim final rules relating to the implementation of certain disclosure and documentation requirements of the Holding Foreign Companies Accountable Act (the “HFCAA”). Furthermore, on June 22, 2021, the U.S. Senate passed the Accelerating Holding Foreign Companies Accountable Act, which, if signed into law, would amend the HFCAA and require the SEC to prohibit an issuer’s securities from trading on any U.S. stock exchanges if its auditor is not subject to PCAOB inspections for two consecutive years instead of three consecutive years. On September 22, 2021, the PCAOB adopted a final rule implementing the HFCAA, which provides a framework for the PCAOB to use when determining, as contemplated under the HFCAA, whether the PCAOB is unable to inspect or investigate registered public accounting firms located in a foreign jurisdiction because of a position taken by one or more authorities in that jurisdiction. On December 2, 2021, the SEC adopted amendments to finalize rules implementing the submission and disclosure requirements in the HFCAA. The final amendments require Commission-Identified Issuers to submit documentation to the SEC establishing that, if true, it is not owned or controlled by a governmental entity in the public accounting firm’s foreign jurisdiction. The amendments also require that a Commission-Identified Issuer that is a “foreign issuer,” as defined in Exchange Act Rule
3b-4,
provide certain additional disclosures in its annual report for itself and any of its consolidated foreign operating entities. Further, the release provides notice regarding the procedures the SEC has established to identify issuers and to impose trading prohibitions on the securities of certain Commission-Identified Issuers, as required by the HFCAA. On December 16, 2021, the PCAOB issued a Determination Report which found that the PCAOB is unable to inspect or investigate registered public accounting firms headquartered in: (1) mainland China, and (2) Hong Kong.
Our auditor, PricewaterhouseCoopers, Taiwan, which is based in Taiwan, is currently subject to inspection by the PCAOB every three years. The audit work on our PRC associate is performed directly by our auditor under a temporary license issued by the Ministry of Finance of the PRC. However, our auditor is unable to provide audit working papers of the Company’s associate in China for PCAOB’s inspection without the approval of the PRC authorities. The potential inability of the PCAOB to inspect our auditor’s working paper of our PRC associate may prevent the PCAOB from fully evaluating audits and quality control procedures of our independent registered public accounting firm. As a result, investors may be deprived of the benefits of PCAOB inspections. Also, the inability of the PCAOB to fully inspect our auditor’s working paper makes it more difficult to evaluate the effectiveness of our auditor’s audit procedures or quality control procedures as compared to other auditors that are subject to PCAOB inspections. Investors may lose confidence in our reported financial information and procedures and the quality of our financial statements. Further, if the PCAOB is not able to fully conduct inspections of our auditor’s work papers of our PRC associate, you may be deprived of the benefits of such inspection which could result in limitation or restriction to our access to the U.S. capital markets and trading of our securities may be prohibited and the NASDAQ may determine to delist our securities if the PCAOB determines that it cannot inspect or investigate our auditor under the HFCAA.
Volatility in the price of our common shares or ADSs may result in shareholder litigation that could in turn result in substantial costs and a diversion of our management’s attention and resources.
The financial markets in the United States and other countries have experienced significant price and volume fluctuations, and market prices of technology companies have been and continue to be extremely volatile. Volatility in the price of our common shares or ADSs may be caused by factors outside of our control and may be unrelated or disproportionate to our results of operations. Shareholders of public companies such as the Company frequently institute securities class action litigations against companies following periods of volatility in the market price of public company securities including common shares and ADSs. Litigation of this kind against the Company could result in substantial costs and a diversion of our management’s attention and resources.
Certain provisions in our constitutive documents and in our severance agreements with our executive officers make the acquisition of us by another company more difficult and costly and therefore may delay, defer or prevent a change of control.
We entered into change in control severance agreements with certain management pursuant to which we agreed to pay certain severance payments if a change in control event (as defined in the change in control severance agreements) occurs and the employment of such executive officer is terminated by our company other than for cause or by such executive officer for good reasons within two years following the occurrence of the change in control event. These agreements may increase the cost of a party seeking to effect a change in control of our company.
 
14

Future sales, pledge or issuance of common shares or ADSs by us or our current shareholders could depress our share price or ADSs price and you may suffer dilution.
Sales of substantial amounts of common shares or ADSs in the public market, the perception that future sales may occur, or the pledge of a substantial portion of our common shares or ADSs could depress the prevailing market price of our common shares or ADSs. See “Item 7. Major Shareholders and Related Party Transactions—Major Shareholders” for further information about our major shareholders.
The Company was listed and commenced trading of common shares on the main board of TWSE on April 11, 2014. See “—Risks Relating to Our Common Shares or ADSs—The Company’s ability to maintain its listing and trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market is dependent on factors outside of the Company’s control and satisfaction of stock exchange requirements. The Company may not be able to overcome such factors that disrupt its trading status of common shares on the Taiwan Stock Exchange or ADSs on the NASDAQ Stock Market or satisfy other eligibility requirements that may be required of it in the future” for additional information on the Company’s listing on the main board of TWSE. We plan to issue, from time to time, additional shares in connection with employee compensation and to finance possible future capital expenditures, investments or acquisitions. See “Item 6. Directors, Senior Management and Employees—Restricted Shares” for a discussion of the plan of the Restricted Shares that we have adopted for the benefit of our employees. The issuance of additional shares may have a dilutive effect on other shareholders and may cause the price of our common shares or ADSs to decrease.
On November 30, 2016, the Company and Unigroup Guowei executed the Equity Interest Transfer Agreement. Under the agreement, ChipMOS BVI, a wholly-owned subsidiary of the Company, would sell 54.98% of the equity interests of its wholly-owned subsidiary, Unimos Shanghai, to strategic investors, including Unigroup Guowei, a subsidiary of Tsinghua Unigroup, which will hold 48% equity interests of Unimos Shanghai. The transaction was completed in March 2017 and Unimos Shanghai is no longer the subsidiary of the Company. On December 16, 2019, Unigroup Guowei and one of the strategic investor sold and transferred all equity interests of Unimos Shanghai to Yangtze Memory Technologies co., Ltd. (“Yangtze Memory”), which holds 50% equity interests of Unimos Shanghai after completed transaction. On May 11, 2020, one of the strategic investor sold and transferred all equity interests of Unimos Shanghai to Yangtze Memory, which holds 50.94% equity interests of Unimos Shanghai after completed transaction.
Holders of Our ADSs do not have the same voting rights as holders of our common shares.
Under the ROC Company Act, except under limited circumstances, shareholders have one vote for each common share held. See “Item 10. Additional Information—Voting Rights” for a discussion of voting rights of holders of our common shares. Holders of our ADSs do not have the same voting rights as holders of our common shares. Instead, the voting rights of a holder of our ADSs are governed by the Deposit Agreement and are able to exercise voting rights on an individual basis as follows: if a holder of our ADSs outstanding at the relevant record date instructs the depositary to vote in a particular manner for or against a resolution, including the election of directors, the depositary will cause all the shares represented by such holder’s ADSs to be voted in that manner. If the depositary does not receive timely instructions from a holder of our ADSs outstanding at the relevant record date to vote in a particular manner for or against any resolution, including the election of directors, such holders of our ADSs will be deemed to have instructed the depositary or its nominee to give a discretionary proxy to a person designated by the Company to vote all the shares represented by such holder’s ADSs at the discretion of such person, which may not be in the interest of holders of our ADSs.
If a
non-ROC
holder of our ADSs withdraws and holds our shares, such holder of our ADSs will be required to appoint a tax guarantor, local agent and custodian in the ROC and register with the TWSE in order to buy and sell securities on the TWSE.
When a
non-ROC
holder of our ADSs elects to withdraw and hold our shares represented by our ADSs, such holder of our ADSs will be required to appoint an agent for filing tax returns and making tax payments in the ROC. Such agent will be required to meet the qualifications set by the ROC Ministry of Finance and, upon appointment, will become the guarantor of the withdrawing holder’s tax payment obligations. Evidence of the appointment of a tax guarantor, the approval of such appointment by the ROC tax authorities and tax clearance certificates or evidentiary documents issued by such tax guarantor may be required as conditions to such holder repatriating the profits derived from the sale of our shares. We cannot assure you that a withdrawing holder will be able to appoint, and obtain approval for, a tax guarantor in a timely manner.
In addition, under the current ROC law, such withdrawing holder is required to register with the TWSE and appoint a local agent in the ROC to, among other things, open a bank account and open a securities trading account with a local securities brokerage firm, pay taxes, remit funds and exercise such holder’s rights as a shareholder. Furthermore, such withdrawing holder must appoint a local bank or local securities firm to act as custodian for confirmation and settlement of trades, safekeeping of securities and cash proceeds and reporting and declaration of information. Without satisfying these requirements,
non-ROC
withdrawing holders of our ADSs would not be able to hold or otherwise subsequently sell our shares on TWSE or otherwise. Appointment of an agent or a tax guarantor might also incur additional costs.
 
15

Pursuant to Mainland investors regulations, only qualified domestic institutional investors (the “QDIIs”, each a “QDII”) or persons that have otherwise obtained the approval from the MOEAIC and registered with the TWSE are permitted to withdraw and hold our shares from a depositary receipt facility. In order to hold our shares, such QDIIs are required to appoint an agent and custodian as required by the Mainland investors regulations. If the aggregate amount of our shares held by any QDII or shares received by any QDII upon a single withdrawal accounts for 10.0% of our total issued and outstanding shares, such QDII must obtain the prior approval from the MOEAIC. We cannot assure you that such approval would be granted.
Restriction on the ability to deposit our shares into our ADR facility may adversely affect the liquidity and price of our ADSs.
The ability to deposit our shares into our ADR facility is restricted by the ROC law. Under the current ROC law, no person or entity, including you and the Company, may deposit our shares into our ADR facility without specific approval of the Financial Supervisory Commission of the ROC, or the FSC, unless:
 
  (1)
the Company pays stock dividends on our shares;
 
  (2)
the Company makes a free distribution of our shares;
 
  (3)
holders of our ADSs exercise preemptive rights in the event of capital increases; or
 
  (4)
to the extent permitted under the Deposit Agreement and the relevant custody agreement and within the amount of depositary receipts which have been withdrawn, investors purchase our shares, directly or through the depositary, on the TWSE, and deliver our shares to the custodian for deposit into our ADR facility, or our existing shareholders deliver our shares to the custodian for deposit into our ADR facility.
With respect to item (4) above, the depositary may issue our ADSs against the deposit of our shares only if the total number of our ADSs outstanding following the deposit will not exceed the number of our ADSs previously approved by the FSC, plus any our ADSs issued pursuant to the events described in items (1), (2) and (3) above.
In addition, in the case of a deposit of our shares requested under item (4) above, the depositary will refuse to accept deposit of such our shares if such deposit is not permitted under any legal, regulatory or other restrictions notified by the Company to the depositary from time to time, which restrictions may include blackout periods during which deposits may not be made, minimum and maximum amounts and frequency of deposits.
The rights of holders of our ADSs to participate in our rights offerings are limited, which could cause dilution to your holdings.
The Company may from time to time distribute rights to its shareholders, including rights to acquire its securities. Under the Deposit Agreement, the depositary will not offer holders of our ADSs those rights unless both the distribution of the rights and the underlying securities to all our ADS holders are either registered under the Securities Act or exempt from the registration under the Securities Act. Although the Company may be eligible to take advantage of certain exemptions under the Securities Act available to certain foreign issuers for rights offering, the Company can give no assurances that it will be able to establish an exemption from registration under the Securities Act, and it is under no obligation to file a registration statement for any of these rights. Accordingly, holders of our ADSs may be unable to participate in our rights offerings and may experience dilution of their holdings.
If the depositary is unable to sell rights that are not exercised or not distributed or if the sale is not lawful or reasonably practicable, it will allow the rights to lapse, in which case holders of our ADSs will receive no value for these rights.
Changes in exchanges controls which restrict your ability to convert proceeds received from your ownership of our ADSs may have an adverse effect on the value of your investment.
Under the current ROC law, the depositary, even without obtaining approvals from the Central Bank of the Republic of China (Taiwan) or any other governmental authority or agency of the ROC, may still convert NT dollars into other currencies, including US dollars, for:
 
   
the proceeds of the sale of common shares represented by ADSs or received as stock dividends from our shares and deposited into the depositary receipt facility; and
 
   
any cash dividends or cash distributions received.
 
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In addition, the depositary may also convert into NT dollars incoming payments for purchase of common shares for deposit in ADR facility against the creation of additional ADSs. However, the depositary may be required to obtain foreign exchange approval from the Central Bank of the Republic of China (Taiwan) on a
payment-by-payment
basis for conversion from NT dollars into foreign currencies of the proceeds from the sale of subscription rights for new common shares. We cannot assure you that any approval will be obtained in a timely manner, or at all.
Under the ROC Foreign Exchange Control Law, the Executive Yuan of the ROC government may, without prior notice but subject to subsequent legislative approval, impose foreign exchange controls in the event of, among other things, a material change in international economic conditions. We cannot assure you that foreign exchange controls or other restrictions will not be introduced in the future.
 
Item 4.
Information on the Company
Overview of the Company
We are one of the leading independent providers of semiconductor assembly and testing services. Specifically, we are one of the leading independent providers of testing and assembly services for LCD, OLED and other display panel driver semiconductors and advanced memory and logic/mixed-signal products in Taiwan. The depth of our engineering expertise and the breadth of our assembly and testing technologies enable us to provide our customers with advanced and comprehensive assembly and testing services. In addition, our geographic presence in Taiwan is attractive to customers wishing to take advantage of the logistical and cost efficiencies stemming from our close proximity to foundries and producers of consumer electronic products in Taiwan. Our production facilities are located in Hsinchu and Tainan, Taiwan.
Our Structure and History
We are a company limited by shares, incorporated on July 28, 1997, under the ROC Company Act, under the name “ChipMOS TECHNOLOGIES INC.” (“ChipMOS Taiwan”), as a joint venture company between Mosel Vitelic Inc. (“Mosel”) and Siliconware Precision Industries Co., Ltd. (“Siliconware Precision”) and with the participation of other investors. Our operations consist of the assembly and testing of semiconductors as well as gold bumping and memory module manufacturing. Our principal place of business is located at No. 1, R&D Road 1, Hsinchu Science Park, Hsinchu, Taiwan, ROC and its phone number is +886-3-577-0055 and our internet website address is “https://www.chipmos.com”. The Company listed and commenced trading on the main board of TWSE on April 11, 2014.
According to the merger agreement, entered between the Company and ChipMOS Bermuda dated January 21, 2016 (the “Merger Agreement”), ChipMOS Bermuda merged with and into the Company, with the Company being the surviving company after the Merger. The transaction was accounted as capital reorganization within the Company and its subsidiaries (the “Group”), please see “Item 5. Operating and Financial Review and Prospects—Recent Acquisitions”. Any common shares of ChipMOS Bermuda issued and outstanding immediately prior to the effective time of the Merger was cancelled and, in exchange, each former holder of such cancelled common shares of ChipMOS Bermuda was entitled to receive, with respect to each such share (i) US$3.71 in cash, without interest, and (ii) 0.9355 ADSs representing 18.71 shares of the Company (each ADS representing 20 new common shares, par value of NT$10 each, to be issued by the Company) in exchange for each of ChipMOS Bermuda’s common share held (the US$3.71 in cash and together with the ADSs, the “Merger Consideration”). The Merger was completed and effective on October 31, 2016. The Company issued 512,405,340 common shares represented by the ADSs and the ADSs were listed on the NASDAQ on November 1, 2016.
The following chart illustrates our corporate structure and our equity interest in each of our principal subsidiaries as of the date of this Annual Report on Form
20-F.
 
17

 
Note:
(1)
Under IFRS 10 “Consolidated Financial Statements”, we are required to consolidate the financial results of any subsidiaries in which we hold a controlling interest or voting interest in excess of 50% or we have the power to direct or cause the direction of the management and policies, notwithstanding the lack of majority ownership. In 2019, we consolidated the financial results of ChipMOS U.S.A., Inc. (“ChipMOS USA”), and ChipMOS BVI. In March 2020, we consolidated the financial results of ChipMOS SEMICONDUCTORS (Shanghai) LTD. (“ChipMOS Shanghai”), a wholly-owned subsidiary of ChipMOS BVI.
Agreements with Tsinghua Unigroup Ltd.
On November 30, 2016, the Equity Interest Transfer Agreements among ChipMOS BVI, a wholly-owned subsidiary of the Company, and some strategic investors which including Unigroup Guowei, a subsidiary of Tsinghua Unigroup, were executed. Pursuant to the Equity Interest Transfer Agreements, ChipMOS BVI would sell 54.98% equity interests of its wholly-owned subsidiary, Unimos Shanghai, to the strategic investors, and Unigroup Guowei would hold 48% equity interests of Unimos Shanghai, and the other strategic investors, including a limited partnership owned by Unimos Shanghai’s employees, would own approximately 6.98% equity interest of Unimos Shanghai. The transaction was completed in March 2017. Unimos Shanghai is no longer the subsidiary of the Company following the completion of equity interests transfer. Also pursuant to the agreement, ChipMOS BVI and the strategic investors agreed to further invest RMB 1,074 million into Unimos Shanghai. The further investment was completed in two tranches, one in July 2017 at RMB 687 million and one in February 2018 at RMB 387 million. On December 16, 2019, Unigroup Guowei and one of the strategic investor sold and transferred all equity interests of Unimos Shanghai to Yangtze Memory, which holds 50% equity interests of Unimos Shanghai after completed transaction. On May 11, 2020, one of the strategic investor sold and transferred all equity interests of Unimos Shanghai to Yangtze Memory, which holds 50.94% equity interests of Unimos Shanghai after completed transaction.
Our Principal Consolidated Subsidiaries
Below is a description of our principal consolidated subsidiaries:
ChipMOS TECHNOLOGIES (BVI) LTD., or formerly known as MODERN MIND TECHNOLOGY LIMITED
ChipMOS BVI was incorporated in the British Virgin Islands in January 2002.
 
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ChipMOS SEMICONDUCTORS (Shanghai) LTD.
ChipMOS Shanghai was incorporated in Mainland China in March 2020, which is a wholly-owned subsidiary of ChipMOS BVI. It primarily engaged in providing marketing of semiconductors and electronic related produces, for its parent company and affiliates, throughout Mainland China.
ChipMOS U.S.A., Inc.
ChipMOS USA was incorporated in the United States of America in October 1999. It is primarily engaged in providing marketing of semiconductors and electronic related produces, for its parent company and affiliates, throughout the United States of America. ChipMOS USA began generating revenue in 2001. As of December 31, 2021, ChipMOS Taiwan owned 100% of the outstanding shares of ChipMOS USA.
Industry Background
We provide a broad range of
back-end
assembly and testing services. Testing services include engineering test, wafer probing and final test of memory and logic/mixed-signal semiconductors. We also offer a broad selection of leadframe- and organic substrate-based package assembly services for memory and logic/mixed-signal semiconductors. Our advanced leadframe-based packages include thin small outline packages, or TSOPs, and our advanced organic substrate-based packages include fine-pitch ball grid array packages (“fine-pitch BGA”). In addition, we provide gold bumping, reel to reel assembly and testing services for LCD, OLED and other display panel driver semiconductors by employing COF and COG technologies.
Semiconductors tested and assembled by us are used in personal computers, graphics applications such as game consoles, communications equipment, mobile products, such as cellular handsets, tablets, consumer electronic products, automotive/industry and display applications such as display panels. In 2021, 21.5% of our revenue was derived from testing services for memory and logic/mixed-signal semiconductors, 29.1% from assembly services for memory and logic/mixed-signal semiconductors, 30.0% from LCD, OLED and other display panel driver semiconductor assembly and testing services and 19.4% from bumping services for semiconductors, respectively.
Semiconductor Industry Trends
Growth in the semiconductor industry is largely driven by
end-user
demand for consumer electronics, communications equipment and computers, for which semiconductors are critical components. The worldwide semiconductor industry has experienced peaks and troughs over the last decade, with a severe downturn at the second half of 2018. Beginning in the fourth quarter of 2018, the semiconductor industry commenced another downturn that increased in unprecedented severity into the first half of 2019. The overall semiconductor industry commenced to recover from the downturn in the second quarter of 2019. However, as the
COVID-19
has spread across the world wide since 2020, many countries have taken extreme measures to contain the transmission, including total or partial lockdown of the infected areas, travel bans, closures of factories, among others, which disrupted the semiconductor supply chain and changed people’s lifestyle and end product demand. For example, work from home and learning from home, led the cloud storage and DDIC demand for TV/NB became stronger. Launch in new 5G smart phone also consumed multiple semiconductor components, such as PMIC, CIS, and TDDI, which tightened the capacity of 8” wafer foundry in 2021. And semiconductor for automotive is also in very serious shortage up to date. Recently, semiconductor capacity, including wafer foundry, raw material supply and OSAT, are still shortage in 2022.
Selected Key Semiconductor Markets
While a recovery trend in
end-user
demand for new and improved electronic products and applications continues, various sectors of the semiconductor industry are in turn expected to benefit from a resumption in growth. These sectors include the memory semiconductor market for industrial, mobile and automotive applications, and the LCD, OLED and other display panel driver semiconductor market.
Memory Semiconductor Market
The potential for memory market growth is linked to anticipated memory content increases in consumer electronics, data center, wireless base-station, PC and smartphone applications due to updated system requirements (such as 5G), increasing use of storage, graphics in gaming and other applications. The memory market is dominated by two segments-DRAM and flash memory. Potential growth in the DRAM and NAND Flash market is expected to be driven by continued growth in both the commodity and niche DRAM market, as well as growth opportunities in mobile DRAM as memory requirements significantly increase for mobile applications and storage requirement for data center application. Flash memory market potential growth is expected to be driven by increasing memory requirements for cellular handsets, digital cameras, digital audio/video, server, wireless base-station, gaming for
COVID-19
pandemic and other mobile applications, and new application demand of NOR flash for automotive/industry, OLED panel and touch with display driver integration (TDDI).
 
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LCD, OLED and Other Display panel Driver Semiconductor Market
Display panels are used in applications such as PC monitors, notebook computers, tables, television sets, cellular handsets and digital cameras. The
end-user
demand for LCD, OLED and other display panel driver semiconductors tends to very over time. From the second half of 2017, increasing penetration rate of UHD TVs, 4K TVs stable strong demand and 8K TVs emerging resulted in increased demand for COF quantities pre TV and to high utilization level of COF assembly. However, some increasing demand of COF for tablet and Notebook panel recently by learning from home and work from home for
COVID-19
outbreak since the second quarter of 2020. Demand for middle and large panel is very strong for work from home, but supply is limited due to the capacity tightened of 8” wafer foundry in 2021. Regarding the small panel application, an integrated driver IC solution, TDDI, which was emerging for use in smart phones since second half of 2018, becomes main stream of smart phone panel in 2021. And wearable application drives OLED DDIC growth in the second half of 2021.
Logic/Mixed-Signal Semiconductor Market
The communications market is one of the main drivers of potential growth in the semiconductor industry. Logic/mixed-signal semiconductors, which are chips with analog functionality covering more than half of the chip area, are largely used in the communications market. The increasing use of digital technology in communications equipment requires chips with both digital and analog functionality for applications such as modems, network routers, switches, cable
set-top
boxes and cellular handsets. As the size and cost of cellular handsets and other communications-related devices have decreased, components have increased in complexity. Logic/mixed-signal semiconductors, such as LCD controller, power devices, fingerprint sensors and MEMS products, TV scaler and DVD controllers, are also used in consumer electronic products.
Overview of the Semiconductor Manufacturing Process
The manufacturing of semiconductors is a complex process that requires increasingly sophisticated engineering and manufacturing expertise. The manufacturing process may be broadly divided into the following stages:
 
 
Process
  
Description
Circuit Design    The design of a semiconductor is developed by laying out circuit patterns and interconnections.
Wafer Fabrication    Wafer fabrication begins with the generation of a photomask, a photographic negative onto which a circuit design pattern is etched or transferred by an electron beam or laser beam writer. Each completed wafer contains many fabricated chips, each known as a die.
Wafer Probe    Each individual die is then electrically tested, or probed, for defects. Dies that fail this test are discarded, or, in some cases, salvaged using laser repair.
 
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Process
  
Description
Assembly    The assembly of semiconductors serves to protect the die, facilitates its integration into electronic systems and enables the dissipation of heat. The process begins with the dicing of the wafers into chips. Each die is affixed to a leadframe-based or organic substrate-based substrate. Then, electrical connections are formed, in many cases by connecting the terminals on the die to the inner leads of the package using fine metal wires. Finally, each chip is encapsulated for protection, usually in a molded epoxy enclosure.
Final Test    Assembled semiconductors are tested to ensure that the device meets performance specifications. Testing takes place on specialized equipment using software customized for each application. For memory semiconductors, this process also includes
“burn-in”
testing to screen out defective devices by applying very high temperatures and voltages onto the memory device.
Outsourcing Trends in Semiconductor Manufacturing
Historically, integrated device manufacturers (“IDMs”), designed, manufactured, tested and assembled semiconductors primarily at their own facilities. In recent years, there has been a trend in the industry to outsource various segments of stages in the manufacturing process to reduce the high fixed costs resulting from the increasingly complex manufacturing process. Virtually every significant stage of the manufacturing process can be outsourced. The independent semiconductor manufacturing services market currently consists of wafer fabrication and probing services and semiconductor assembly and testing services. Most of the world’s major IDMs now use some independent semiconductor manufacturing services to maintain a strategic mix of internal and external manufacturing capacity. Many of these IDMs are continuously significantly reducing their investments in new semiconductor assembly and testing facilities.
The availability of technologically advanced independent semiconductor manufacturing services has also enabled the growth of “fabless” semiconductor companies that focus exclusively on semiconductor design and marketing and outsource their fabrication, assembly and testing requirements to independent companies.
We believe the outsourcing of semiconductor manufacturing services, and in particular of assembly and testing services, will increase for many reasons, including the following:
Significant Capital Expenditure Requirements.
Driven by increasingly sophisticated technological requirements, wafer fabrication, assembly and testing processes have become highly complex, requiring substantial investment in specialized equipment and facilities and sophisticated engineering and manufacturing expertise. In addition, product life cycles have been shortened magnifying the need to continuously upgrade or replace manufacturing, assembly and testing equipment to accommodate new products. As a result, new investments in
in-house
fabrication, assembly and testing facilities are becoming less desirable for IDMs because of the high investment costs, as well as difficulties in achieving sufficient economies of scale and utilization rates to be competitive with the independent service providers. On the contrary, independent foundry, assembly and testing companies are able to realize the benefits of specialization and achieve economies of scale by providing services to a large customer base across a wide range of products. This enables them to reduce costs and shorten production cycles through high capacity utilization and process expertise.
Increasing Focus on Core Competencies.
As the costs of semiconductor manufacturing facilities increase, semiconductor companies are expected to further outsource their wafer fabrication, assembly and testing requirements to focus their resources on core competencies, such as semiconductor design and marketing.
Time-to-Market
Pressure.
Increasingly short product life cycles have amplified
time-to-market
pressure for semiconductor companies, leading them to rely increasingly on independent companies as a key source for effective wafer fabrication, assembly and testing services.
Semiconductor Assembly and Testing Services Industry
Growth in the semiconductor assembly and testing services industry is driven by increased outsourcing of the various stages of the semiconductor manufacturing process by IDMs and fabless semiconductor companies.
 
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The Semiconductor Industry and Conditions of Outsourcing in Taiwan and Mainland China
Taiwan is one of the world’s leading locations for outsourced semiconductor manufacturing. The semiconductor industry supply chain in Taiwan has developed such that the various stages of the semiconductor manufacturing process have been disaggregated, thus allowing for specialization. The disaggregation of the semiconductor manufacturing process in Taiwan permits these semiconductor manufacturing service providers to focus on particular parts of the production process, develop economies of scale, maintain higher capacity utilization rates and remain flexible in responding to customer needs by lowering
time-to-market
pressure faced by semiconductor companies. There are several leading service providers in Taiwan, each of which offers substantial capacity, high-quality manufacturing, leading semiconductor wafer fabrication, test, assembly and process technologies, and a full range of services. These service providers have access to an educated labor pool and a large number of engineers suitable for sophisticated manufacturing industries. As a result, many of the world’s leading semiconductor companies outsource some or all of their semiconductor manufacturing needs to Taiwan’s semiconductor manufacturing service providers and take advantage of the close proximity among facilities in the supply chain. In addition, companies located in Taiwan are very active in the design and manufacture of electronic systems, which has created significant local demand for semiconductor devices.
A few years ago, Mainland China had emerged as an attractive location for outsourced semiconductor manufacturing. Companies could take advantage of strongly supports by Mainland China government to accelerate the development of the semiconductor industry and a large domestic market. These factors had driven increased relocation of much of the electronics industry manufacturing and supply chain to Mainland China. But according to the economics uncertainty caused by the trade tensions, the related investment risk in China is increasing. An increasing number of global electronic systems manufacturers and contract manufacturers are relocating or have relocated production facilities away from Mainland China.
Our Strategy
Our goal is to reinforce our position as a leading independent provider of semiconductor assembly and testing services, concentrating principally on memory, logic/mixed-signal and LCD, OLED and other display panel driver semiconductors. The principal components of our business strategy are set forth below.
Focus on Providing Our Services to Potential Growth Segments of the Semiconductor Industry.
We intend to continue our focus on developing and providing advanced assembly and testing services for potential growth segments of the semiconductor industry, such as memory, logic/mixed-signal, MEMS, LCD, OLED and other display panel driver semiconductors and bumping services. We believe that our investments in equipment and research and development in some of these areas allow us to offer a service differentiated from that of our competition. In order to benefit from the expected resumption of growth in these segments, we intend to continue to invest in capacity to meet the assembly and testing requirements of these key semiconductor market segments.
Continue to Invest in the Research and Development of Advanced Assembly and Testing Technologies.
Critical to our business growth is the continuation to expand our capabilities in testing and assembly and integrate wafer bumping and assembly core technologies to provide
turn-key
total solution service to our customers. We typically focus on advanced technologies that consist of greater potentials to generate higher margins. For example, we conducted new product introductions and on an
on-going
basis continue to expand our capabilities in fine-pitch wafer bumping, multi-chip package (“MCP”), flip chip package, and high speed assembly and testing of fine-pitch TDDI and 12” COFs. We have also introduced low cost metal composite bump (“MCB”) products based on our proprietary Cu plating technology to service display panel market and expand offerings to other business regions. We continue to maintain close working relationships with local and overseas research institutions and universities to keep abreast with leading edge technologies and broaden the scope of applications.
In 2022, we focus our research and development efforts in the following areas:
 
   
Developing 2P2M process development for Cu RDL structure.
 
   
Shrink copper pillar pitch to 45um for micro bump solution.
 
   
Implement new high conductivity thermal conductive resin for COF package solution.
 
   
Develop ultra fine pitch (UFP) COF assembly and testing technology.
 
22

   
Enhance Pb free ball level capability (increase thermal cycle lifetime >1000 cycles).
 
   
Low loss substrate development for optimized RLC match.
In 2021, we spent approximately 4.2% of our revenue on research and development. We will continue to invest our resources to recruit and retain experienced research and development personnel. As of March 31, 2022, our research and development team comprised 661 persons.
Build on Our Strong Presence in Taiwan and Strong Industrial Position Outside Taiwan.
We intend to build on our strong presence in key centers of semiconductor and electronics manufacturing to grow our business. Currently, most of our operations are in Taiwan, one of the world’s leading locations for outsourced semiconductor manufacturing. This presence provides us with several advantages. Firstly, our proximity to other semiconductor companies is attractive to customers who wish to outsource various stages of the semiconductor manufacturing process. Secondly, our proximity to many of our suppliers, customers and the
end-users
of our customers’ products enables us to be involved in the early stages of the semiconductor design process, enhances our ability to quickly respond to our customers’ changing requirements and shortens our customers’
time-to-market.
Thirdly, we have access to an educated labor pool and a large number of engineers who are able to work closely with our customers and other providers of semiconductor manufacturing services.
Depending on customer’s demands, market conditions and other relevant considerations, we may from time to time look into other opportunities to expand our operations outside of Taiwan.
Expand Our Offering of Vertically Integrated Services.
We believe that one of our competitive strengths is our ability to provide vertically integrated services to our customers. Vertically integrated services consist of the integrated testing, assembly and direct shipment of semiconductors to
end-users
designated by our customers. Providing vertically integrated services enables us to shorten lead times for our customers. As
time-to-market
and cost increasingly become sources of competitive advantage for our customers, they increasingly value our ability to provide them with comprehensive
back-end
services.
We are able to offer vertically integrated services for a broad range of products, including memory, logic/mixed-signal and LCD, OLED and other display panel driver semiconductors. These services offerings include complementary technologies, products and services as well as additional capacity. We believe that these will continue to enhance our own development and expansion efforts into new and potential growth markets. We intend to establish new alliances with leading companies and, if suitable opportunities arise, engage in merger and acquisition activities that will further expand the services we can provide.
Focus on Increasing Sales through Long-Term Agreements with Key Customers as well as Business with Smaller Customers.
From time to time, we strategically agree to commit a portion of our assembly and testing capacity to certain of our customers. We intend to continue focus on increasing sales to key customers through long-term capacity agreements. The customers with which we entered long-term agreements include a reputable memory customer based in the U.S. See “—Customers” below for a more detailed discussion of these long-term agreements.
Global market and economic conditions have been unprecedented and challenging with tight credit conditions and recession in most major economies since 2008. Since the fourth quarter of 2021, a new long term capacity secure agreement with our customer about high end wafer test for OLED and other display panel driver demand in 2022 was settled to reduce our investment risk. We also resumed our focus on our business with smaller customers or customers who do not place orders on a regular basis. We believe that the dual focused strategy will assist us to be better prepared for the current economic volatility and ensure maximum utilization rate of our capacity and help us to develop closer relationships with all types of our customers.
 
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Principal Products and Services
The following table presents, for the periods shown, revenue by service segment as a percentage of our revenue.
 
    
Year ended December 31,
 
    
2019
   
2020
   
2021
 
Testing
     20.9     21.7     21.5
Assembly
     25.3       26.1       29.1  
LCD, OLED and other display panel driver semiconductor assembly and testing revenue
     34.1       30.5       30.0  
Bumping
     19.7       21.7       19.4  
  
 
 
   
 
 
   
 
 
 
Total revenue
     100.0     100.0     100.0
  
 
 
   
 
 
   
 
 
 
Memory and Logic/Mixed-Signal Semiconductors
Testing
We provide testing services for memory and logic/mixed-signal semiconductors:
Memory.
We provide testing services for huge amount of varieties of memory semiconductors, such as SRAM, DRAM and Flash memory. To speed up the time-consuming process of memory product testing, we provide parallel test, which includes the completion of a tested wafer in one touchdown (up to 2,000 plus DUTs testing simultaneously). Wafer type includes Aluminum PAD, RDL PAD, Cu Pillar, WLCSP and prober test temperature between
-55°~150°
and provide 30MHz ~ 1066 MHz test speed for DRAM product, 50MHz ~ 400 MHz test speed for FLASH product. The memory semiconductors we tested were applying primarily in desktop computers, laptop, tablet computers, handheld consumer electronic, devices and wireless communication devices.
Logic/Mixed-Signal.
We conduct tests on a wide variety of logic/mixed-signal semiconductors, with lead counts ranging from the single digits to over 1024 and data rate of up to 16Gbps. The semiconductors we test include
high-end
audio/video codec, networking/communications, MCU, LCD related, MEMS related, DDR related and automotive electronics used for home entertainment/media center, personal computer applications, network/communication, mobile smart devices and cars. We also test a variety of application specific integrated circuits (“ASICs”), for applications such as FHD/UHD/8K LCD TV with AI functions, Smartphone, Tablet PC and Cars etc.
The following is a description of our
pre-assembly
testing services:
Engineering Testing.
We provide engineering testing services, including software program development, electrical design validation, reliability and failure analysis.
 
   
Software Program Development
Design and test engineers develop a customized software program and related hardware to test semiconductors on advanced test equipment. A customized software program is required to test the conformity of each particular semiconductor to its particular function and specification.
 
   
Electrical Design Validation.
A prototype of the designed semiconductor is submitted to electrical tests using advanced test equipment, customized software programs and related hardware. These tests assess whether the test result of the prototype semiconductor complies with the designed requirements using a variety of different operating specifications, including functionality, frequency, voltage, current, timing and temperature range.
 
   
Reliability Analysis. Reliability analysis is designed to assess the long-term reliability of the semiconductor and its suitability of use for its intended applications. Reliability testing may include operating-life evaluation, during which the semiconductor is subjected to high temperature and voltage tests.
 
   
Failure Analysis.
If the prototype semiconductor does not perform to specifications during either the electrical validation or reliability analysis process, failure analysis is performed to determine the reasons for the failure. As part of this analysis, the prototype semiconductor may be subjected to a variety of tests, including electron beam probing and electrical testing.
Wafer Probing.
Wafer probing is a processing stage proceeding to the assembly of semiconductors and which involves visual inspection and electrical testing to ensure the processed wafers meets our customers’ specifications. Tests are conducted using specialized equipment with software customized for each application in different temperature conditions ranging from -55 degrees Celsius to 200 degrees Celsius. Wafer probing employs sophisticated design and manufacturing technologies to connect the terminals of each chip for testing. Defect chips are marked on the surface or memorized in an electronic file, known as a mapping file, to the following facilitate subsequent process.
 
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Laser Repairing.
This is a unique process in testing operation for special SOC memory products. In laser repairing, specific poly or metal fuses are blown after wafer probing to enable a spare row or column of a memory unit in SOC the replacement of the defective memory cell.
After assembly, we perform the following testing services:
Burn-In
Testing.
This process screens out unreliable products using high temperature, high voltage and prolonged stresses environment to ensure that finished products will survive a long period of
end-user
service. This process is used only for memory products. This process needs customized
Burn-In
board.
Top Marking.
By using laser marker, the marking content were according to our customers’ specification, including the logo, part number, date code and lot number.
Final Testing.
Assembled semiconductors are tested to ensure that the devices meet performance specifications. Tests are conducted using specialized equipment with software customized for each application in different temperature conditions ranging from
-40
degrees Celsius to 175 degrees Celsius.
Final Inspection and Packing.
Final inspection involves visual or auto-inspection of the devices to check any bent leads, ball damage, inaccurate markings or other package defects. Packing involves dry packing,
package-in-tray,
package-in-tube
and tape and reel. According to package level, Dry packing involves heating semiconductors in a tray at 125 degrees Celsius for about four to six hours to remove the moisture before the semiconductors are vacuum-sealed in an aluminum bag.
Package-in-tube
involves packing the semiconductors in anti-static tubes for shipment. Tape and reel pack involves transferring semiconductors from a tray or tube onto an anti-static embossed tape and rolling the tape onto a reel for shipment to customers.
Assembly
Our assembly services generally involve the following steps:
 
Wafer Lapping
   The wafers are ground to their required thickness.
Die Saw
   Wafers are cut into individual dies, or chips, in preparation for the
die-attach
process.
Die Attach
   Each individual die is attached to the leadframe or organic substrate.
Wire Bonding
   Using gold or silver wires, to connect the I/O pads on the die to the inner lead of leadframe or substrate.
Flip Chip Bonding
   Using solder bumps or Cu pillar bumps on die, to connect the leadframe or substrate pad via soldering reflow.
Molding
   The die and wires are encapsulated to provide physical support and protection.
Marking
   Each individual package is marked to provide product identification.
Dejunking and Trimming
   Mold flash is removed from between the lead shoulders through dejunking, and the dambar is cut during the trimming process.
Electrical Plating
   A solderable coating is added to the package leads to prevent oxidization and to keep solder wettability of the package leads.
Ball Mount and Reflow
   Each electrode pad of the substrate is first printed with flux, after which solder balls are mounted, heated and attached to the electrode pad of the substrate through a reflow oven.
Forming/Singulation
   Forming involves the proper configuration of the device packages leads, and singulation separates the packages from each other.
We offer a broad range of package formats designed to provide our customers with a broad array of assembly services. The assembly services we offer customers are leadframe-based packages, which include thin small outline packages, and organic substrate-based packages, including fine-pitch BGA.
 
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The differentiating characteristics of these packages include:
 
   
the size of the package;
 
   
the number of electrical connections which the package can support;
 
   
the electrical performance and requirements of the package; and
 
   
the heat dissipation requirements of the package.
As new applications for semiconductor devices require smaller components, the size of packages has also decreased. In leading-edge packages, the size of the package is reduced to just slightly larger than the size of the individual chip itself in a process known as chip scale packaging.
As semiconductor devices increase in complexity, the number of electrical connections required also increases. Leadframe-based products have electrical connections from the semiconductor device to the electronic product through leads on the perimeter of the package. Organic substrate-based products have solder balls on the bottom of the package, which create the electrical connections with the product and can support large numbers of electrical connections.
Leadframe-Based Packages.
These are generally considered the most widely used package category. Each package consists of a semiconductor chip encapsulated in a plastic molding compound with metal leads on the perimeter. This design has evolved from a design plugging the leads into holes on the circuit board to a design soldering the leads to the surface of the circuit board.
The following diagram presents the basic components of a standard leadframe-based package for memory semiconductors:
 
To address the market for miniaturization of portable electronic products, we are currently developing and will continue to develop increasingly smaller versions of leadframe-based packages to keep pace with continually shrinking semiconductor device sizes. Our advanced leadframe-based packages generally are thinner and smaller, have more leads and have advanced thermal and electrical characteristics when compared to traditional packages. As a result of our continual product development, we offer leadframe-based packages with a wide range of lead counts and sizes to satisfy our customers’ requirements.
The following table presents our principal leadframe-based packages, including the number of leads in each package, commonly known as lead-count, a description of each package and the
end-user
applications of each package.
 
Package
  
Lead-
count
  
Description
  
End-User Applications
Thin Small Outline Package I (TSOP I)   
48-56
   Designed for high volume production of low lead-count memory devices, including flash memory, SRAM and MROM    Notebook computers, personal computers, still and video cameras and standard connections for peripherals for computers
Thin Small Outline Package II (TSOP II)   
44-86
   Designed for memory devices, including flash memory, SRAM, SDRAM and DDR DRAM    Disk drives, recordable optical disk drives, audio and video products, consumer electronics, communication products
 
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Package
  
Lead-
count
  
Description
  
End-User Applications
Quad Flat No Lead (QFN)   
8-132
   Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance    Wireless communication products, notebook computers, PDAs, consumer electronics
Low-Profile
Quad Flat Package (LQFP)
   48   
Low-profile
and light weight package designed for ASICs, digital signal processors, microprocessors/ controllers, graphics processors, gate arrays, SSRAM, SDRAM, personal computer chipsets and mixed-signal devices
   Wireless communication products, notebook computers, digital cameras, cordless/radio frequency devices
Small Outline Package (SOP)    8    Designed for low lead-count memory and logic semiconductors, including SRAM and micro-controller units    Personal computers, consumer electronics, audio and video products, communication products
Multi-Chip Package (TSOP)   
44-86
   Our patented design for memory devices, including SRAM, DRAM and SDRAM    Notebook computers, personal computers, disk drives, audio and video products, consumer products, communication products
Flip Chip Quad Flat No Lead (FCQFN)   
6-24
   Thermal enhanced quad flat no lead package providing small footprint (chip scale), light weight with good thermal and electrical performance Flip chip process is designed for better electrical performance compared to wire bonding process    Wireless communication products, notebook computers, PDAs, consumer electronics
Organic Substrate-based Packages.
As the number of leads surrounding a traditional leadframe-based package increases, the leads must be placed closer together to reduce the size of the package. The close proximity of one lead to another can create electrical shorting problems and requires the development of increasingly sophisticated and expensive techniques to accommodate the high number of leads on the circuit boards.
The BGA format solves this problem by effectively creating external terminals on the bottom of the package in the form of small bumps or balls. These balls are evenly distributed across the entire bottom surface of the package, allowing greater pitch between the individual terminals. The ball grid array configuration enables
high-pin
count devices to be manufactured less expensively with less delicate handling at installation.
Our organic substrate-based packages employ a fine-pitch BGA design, which uses a plastic or tape laminate rather than a leadframe and places the electrical connections, or leads, on the bottom of the package rather than around the perimeter. The fine-pitch BGA format was developed to address the need for the smaller footprints required by advanced memory devices. Benefits of ball grid array assembly over leadframe-based assembly include:
 
   
smaller size;
 
   
smaller footprint on a printed circuit board;
 
   
better electrical signal integrity; and
 
   
easier attachment to a printed circuit board.
 
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The following diagram presents the basic component parts of a fine-pitch BGA package:
 
 
The following table presents the ball-count, description and
end-user
applications of organic substrate-based packages we currently assemble:
 
Package
  
Connections
  
Description
  
End-User
Applications
Mini BGA   
24-400
  
Low-cost
and space-saving assembly designed for low input/output count, suitable for semiconductors that require a smaller package size than standard BGA
   Memory, analog, flash memory, ASICs, radio frequency devices, personal digital assistants, cellular handsets, communication products, notebook computers, wireless systems
Fine-Pitch BGA   
54-126
   Our patented design for DRAM products that require high performance and chip scale package (CSP)    Notebook computers, cellular handsets, global positioning systems, personal digital assistants, wireless systems
Very Thin Fine-Pitch BGA   
48-176
   Similar structure of Mini BGA package with thinner and finer ball pitch that is designed for use in a wide variety of applications requiring small size, high reliability and low unit cost    Handheld devices, notebook computers, disk drives, wireless and mobile communication products
Land Grid Array (LGA)   
8-52
   Thinner and lighter assembly designed essential to standard BGA without solder balls, suitable for applications that require high electrical performance    Disk drives, memory controllers, wireless, mobile communication products
Multi-Chip BGA   
48-153
   Designed for assembly of two or more memory chips (to increase memory density) or combinations of memory and logic chips in one BGA package    Notebook computers, digital cameras, personal digital assistants, global positioning systems,
sub-notebooks,
board processors, wireless systems
Stacked-Chip BGA   
24-345
   Designed for assembly of two or more memory chips or logic and memory chips in one CSP, reducing the space required for memory chips    Cellular handsets, digital cameras, personal digital assistants, wireless systems, notebook computers, global positioning systems
Flip Chip Chip-scale Package (FCCSP)   
16-1500+
   Better IC protection and solder joint reliability compared to direct chip attach (DCA) and chip on board (COB)    Memory, logic, microprocessor, application processor (AP), baseband (BB), solid state device, radio frequency (RF)
 
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Package
  
Connections
  
Description
  
End-User
Applications
Multi-Chip Hybrid Package (FC+WB)   
153-345
   Designed for assembly of two or more memory chips or combinations of memory and logic chips in one BGA package with both of flip chip and wire bonding    Embedded Multi Media Card (eMMC), BGA SSD
Chip on Wafer (CoW)   
5-30
   Integrated two different functional chips to a closer form into a compact package.
Low-cost
solution compared to through-silicon via (TSV)
   Integrated MEMS
Land Grid Array (LGA) for FPS
(finger Print Sensor)
  
20-52
   Very thin clearance (50um) between chip & compound hard color coating with scratch resistance for protection and appearance matching of mobile devices    Security protection for mobile devices, home, notebook computer, etc.
Wafer Level Chip Scale Package (WLCSP)   
6-125
   WLCSP package size is almost the same as die size. Simple assembly process flow, low cost. Small package suitable to apply on hand-held 3C electronic products    Electronic Compass, audio converter, nor flash product, power control, sensor magnetometer, MEMS magnetometer, CMOS Image Sensor controller, Laser diode driver, power manager IC (PMIC)
Wafer Level CSP
 
Wafer-level CSP (WLCSP) is the technology of packaging an integrated circuit at wafer level. WLCSP is essentially a true chip scale package (CSP) technology, since the resulting package is practically of the same size as the die. WLCSP has the ability to enable true integration of wafer fab, packaging, test, and
burn-in
at wafer level in order to streamline the manufacturing process undergone by a device start from silicon wafer to customer shipment.
Most other kinds of packaging do wafer dicing first, and then puts the individual die in a plastic package and attaches the solder bumps. WLCSP involves the RDL, wafer solder bumping, while still in the wafer, and then wafer dicing. Benefits of WLCSP compare to general CSP package assembly include:
 
   
ultimate smaller package size;
 
   
smaller footprint on a printed circuit board;
 
   
very short circuit connection; and
 
   
cost effective packaging solution for small ICs.
 
Package
  
Connections
  
Description
  
End-User Applications
WLCSP   
4-90
   Very small package size (identical to die size), suitable for the low pin count and require the small package size application    Memory, ASICs, PMIC, MEMS devices, controllers, for mobile phone, tablet, ultra book computer and wearable product
 
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FC CSP
 
 
 
Flip-chip chip scale package (FC CSP) construction utilizes the flip chip bumping (with solder bump or Cu pillar bump) interconnection technology to replace the standard wire-bond interconnect. It allows for a smaller form factor due to wire loop reduction and area array bumping. FC CSP includes the substrate or leadframe type solution making an attractive option for advanced CSP application when electrical performance is a critical factor.
 
   
Excellent electrical performance, very low interconnect parasitics and inductance compare to wirebond type.
 
   
High electrical current endurance (Cu pillar bump), ideal for high power and high speed logic solution.
 
   
High electrical performance (Cu pillar bump), ideal for lower return loss and higher insertion loss.
 
   
Reduce Bump Pitch and die size (Cu pillar bump vs. solder bump), ideal for increasing gross die/wafer.
 
   
Smaller package form factor by reducing the wire loop height and wire span compared to conventional wirebond package.
 
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Package
  
Connections
  
Description
  
End-User
Applications
FC CSP   
8-1288
   Superior electrical performance, smaller form factor    Power device, RF, High speed Logic device, wireless, memory or portable application
Display Driver Semiconductors and Gold MCB Bumping
We also offer assembly and testing services for display driver semiconductors. We employ COF and COG technologies for testing and assembling display driver semiconductors. In addition, we offer gold bumping and metal composite bump services to our customers.
Chip-on-Film
(COF) Technology
COF technology provides several additional advantages. For example, COF is able to meet the size, weight and higher resolution requirements in electronic products, such as display panels. This is because of its structural design, including an adhesive-free
two-layer
tape that is highly flexible, bending strength and its capacity to receive finer patterning pitch.
COF package has been using for
large-size
and high-resolution panel display, especially on
TFT-LCD
and OLED TV set and NB as well. In recent years, there has been an observable trend with which the average inner lead pitch of COF package went down to 23um with more than 50% of market demand. High thermal dissipation packaging technology is available for mass production. And dual IC with high thermal dissipation COF packaging technology is ready for 8K TV market. 18um/16um inner lead pitch
2-metal
layer COF package is in development for coming AR/VR gear requirement. And we can test display driver semiconductors with frequency up to 4Gbps and 6.5Gbps to fulfill high speed data rate requirement. For automotive application, low temperature COF package testing technology is developed.
The following diagram presents the basic components of
1-metal
layer COF and
2-metal
layer COF:
 
The COF process involves the following steps:
 
Chip Probing
   Screen out the defect chips which fail to meet the device spec.
Wafer Lapping/Polish
 
Laser Grooving
  
Wafers are grounded or with polish to their required thickness.
 
Application in wafer within
Low-K
material to reduce chipping of chips during dicing process.
Die Saw
   Wafers are cut into individual dies, or chips, in preparation for inner lead bonding process.
Inner Lead Bonding
   An inner lead bonding machine connects the chip to the printed circuit tape.
Potting
   An underfill process to fill resin to protect the inner lead and chip.
Potting Cure
   The potting cure process matures the resin used during the potting oven with high temperatures.
Marking
   A laser marker is used to provide product identification.
Final Testing
   To verify device spec. within electrical testing after assembly process.
Taping
   To attach heat sink/spreader or stiffener material onto COF package.
Inspection and Packing
   Each individual die with tape is visually or auto inspected for defects. The dies are packed within a reel into an aluminum bag after completion of the inspection process.
 
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Chip-on-Glass
(COG) Technology
COG technology is an electronic assembly technology that is used in assembling display driver semiconductors including TV/monitor, mobile and wearable products. Compared to the traditional bonding process for COF, the new COG technology requires lower bonding temperature. In addition, the COG technology reduces assembly cost as it does not use tapes for interconnection between the LCD, OLED panel and the printed circuit board. The major application of COG products is on
TFT-LCD
and AMOLED display of smart phone and automotive market, it integrates source, gate driver of display driver IC (DDIC) and TDDI or timing Controller IC into one chip, so the output channel is higher than COF products. For the market trend of thinner smartphone, 150um in IC thickness is released for mass production and much thinner IC thickness is in development.
The COG assembly process involves the following steps:
 
Chip Probing
   To screen out the defect chips which fail to meet the device spec.
Wafer Lapping/Polish
   Wafers are ground or with polished to their required thickness.
Laser Marking
   A laser mark is applied on IC backside in wafer form to provide product traceability.
Laser Grooving
   Application in wafer within
Low-K
material to reduce chipping of chips during dicing process.
Die Saw
   Wafers are cut into individual dies, or chips, in preparation for the pick and place process.
Auto Optical Inspection
   Process of wafer inspection is detecting defect to separate chips at pick and place station.
Pick and Place
   Each individual die is picked and placed into a chip tray.
Inspection and Packing
   Each individual die in a tray is visually or auto-inspected for defects. The dies are packed within a tray into an aluminum bag after completion of the inspection process.
Bumping
We also offer bumping services to our customers.
Based on the major product portfolio (judged by internal metal composition), we provide:
 
   
Gold Family (Au bump, Au metal composite bump and Au RDL)
Gold bumping technology, which is in high demand for LCD driver ICs. This and stronger TDDI demand resulted in higher utilization levels in 2019. In 2020 to date, continued growth has been led by emerging demand strength in OLED displays. We expect this demand trend will be supported by rapid adoption in smart phones and positive user experience. Increased chip size design for RAM capacity contributes production capacity of twelve-inch wafers. Gold bumping technology is characterized by providing the best solution for fine-pitch chips to meet the highly efficient production requirement display panel. In 2021, we increased gold bumping wafer shipments resulting from demand for of high refresh rate panel, 5G mobile, gaming monitor, 8K display and automotive infotainment applications. In 2022, ChipMOS aims to develop VR/AR wearable devices for metaverse application opportunity. Meanwhile, medical, automotive and integration TDDI products are still our main business goal.
 
   
RDL technology
As high speed, high performance and high accuracy requirement, many electronic devices need the capability of transferring higher current. By using
Re-distribution
layer (RDL) technology which can relocate to the PKG wire bonding position where necessary. ChipMOS can provide several electroplating metal thickness based on customer design request, including 2P1M, 2P2M and 3P2M structures. The min. Line/space of RDL could be 5um / 5um that makes integration of MCP and SIP achievable.
 
   
Cu/Solder Family (WLCSP, Lead free solder plating and Cu Pillar)
We believe that consumer electronics are driving the application growth of these processes. From small wearable gadgets, NOR flash applications, power devices to emerging AIoT/AI development are all included. We expanded our bumping factory line capacity toward the consumer market and we expect this to continue to deliver good performance. Through 12” WLCSP process for NOR flash to provide a thinner and smallest chip size for TWS (True Wireless Stereo) application is a success case recently. Now, Copper pillar and flip chip solution is another packaging solution for this application. Fine pitch Copper pillar is an effective way to increase interconnection densities. The typical Copper pillar height is 50~70 um, further development is micro bump, which reducing Copper pillar size and height. Copper pillar also offers advantages with respect to better electrical and thermal conductivity, as well as increasing electromigration resistance and current carrying capability.
 
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Other Services
Drop Shipment
We offer drop shipment of semiconductors directly to
end-users
designated by our customers. We provide drop shipment services, including assembly in customer-approved and branded boxes, to a majority of our assembly and testing customers. Since drop shipment eliminates the additional step of inspection by the customer prior to shipment to
end-users,
quality of service is a key to successful drop shipment service. We believe that our ability to successfully execute our full range of services, including drop shipment services, is an important factor in maintaining existing customers as well as attracting new customers.
Software Development, Conversion and Optimization Program
We work closely with our customers to provide sophisticated software engineering services, including test program development, conversion and optimization, and related hardware design. Generally, testing requires customized testing software and related hardware to be developed for each particular product. Software is often initially provided by the customer and then converted by us at our facilities for use on one or more of our testing machines and contains varying functionality depending on the specified testing procedures. Once a conversion test program has been developed, we perform correlation and trial tests on the semiconductors.
Customer feedback on the test results enables us to adjust the conversion test programs prior to actual testing. We also typically assist our customers in collecting and analyzing the test results and recommends engineering solutions to improve their design and production process.
Customers
We believe that the following factors have been, and will continue to be, important factors in attracting and retaining customers:
 
   
our advanced assembly and testing technologies;
 
   
our strong capabilities in testing and assembling DDIC/TDDI and other display panel driver semiconductors;
 
   
our focus on high-density memory products and logic/mixed-signal communications products; and
 
   
our reputation for high quality and reliable customer-focused services.
The number of our customers as of March 31 of 2020, 2021 and 2022, respectively, was 75, 75 and 78. Our top 15 customers in terms of revenue in 2021 were (in alphabetical order):
Asahi Kasei Microdevices Corporation
Chipone Technology (Beijing) Co., Ltd.
Elan Microelectronics Corp.
Elite Semiconductor Microelectronics Technology Inc.
Himax Technologies, Inc.
ILI Technology Corporation
Integrated Circuit Solution Inc.
Macronix International Co., Ltd.
MediaTek Inc.
Micron Technology, Inc.
Novatek Microelectronics Corp.
Phison Electronics Corp.
Raydium Semiconductor Corporation
Synaptics Incorporated
Winbond Electronics Corporation
In 2019, our top three customers accounted for approximately 23%, 12% and 10% of our revenue, respectively. In 2020, our top three customers accounted for approximately 22%, 12% and 10% of our revenue, respectively. In 2021, our top three customers accounted for approximately 21%, 10% and 9% of our revenue, respectively.
The majorities of our customers purchase our services through purchase orders and provide us three-month
non-binding
rolling forecasts on a monthly basis. The price for our services is typically agreed upon at the time when a purchase order is placed.
 
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The following table sets forth, for the periods indicated, the percentage breakdown of our revenue, categorized by geographic region based on the jurisdiction in which each customer is headquartered.
 
    
Year ended December 31,
 
    
2019
   
2020
   
2021
 
Taiwan
     78     80     79
Japan
     9       5       6  
Singapore
     7       8       6  
PRC
     4       5       7  
Others
     2       2       2  
  
 
 
   
 
 
   
 
 
 
Total
     100     100     100
  
 
 
   
 
 
   
 
 
 
Qualification and Correlation by Customers
Our customers generally require that our facilities undergo a stringent “qualification” process during which the customer evaluates our operations, production processes and product reliability, including engineering, delivery control and testing capabilities. The qualification process typically takes up to eight weeks, or longer, depending on the requirements of the customer. For test qualification, after we have been qualified by a customer and before the customer delivers semiconductors to us for testing in volume, a process known as “correlation” is undertaken. During the correlation process, the customer provides us with test criteria; information regarding process flow and sample semiconductors to be tested and either provides us with the test program or requests that we develop a new or conversion program. In some cases, the customer also provides us with a data log of results of any testing of the semiconductor that the customer may have conducted previously. The correlation process typically takes up to two weeks, but can take longer depending on the requirements of the customer.
Sales and Marketing
We maintain sales and marketing offices in Taiwan, the United States and Mainland China. Our sales and marketing strategy is to focus on memory semiconductors in Taiwan, Japan, Singapore, Korea and the United States, logic/mixed-signal semiconductors in Taiwan, Japan and the United States, LCD, OLED and other display panel driver semiconductors in Japan, Korea, Taiwan, Hong Kong and Mainland China. As of March 31, 2022, our sales and marketing efforts were primarily carried out by teams of sales professionals, application engineers and technicians, totaling 35 staff members. Each of these teams focuses on specific customers and/or geographic regions. As part of our emphasis on customer service, these teams:
 
   
actively participate in the design process at the customers’ facilities;
 
   
resolve customer assembly and testing issues; and
 
   
promote timely and individualized resolutions to customers’ issues.
We conduct marketing research through our
in-house
customer service personnel and through our relationships with our customers and suppliers to keep abreast of market trends and developments. Furthermore, we do product and system bench marking analysis to understand the application and assembly technology evolution, such as analysis on mobile handsets and Tablet, PC, wearable products. In addition, we regularly collect data from different segments of the semiconductor industry and, when possible, we work closely with our customers to design and develop assembly and testing services for their new products. Sale will cowork with internal technology expert to work closely with our customers as project kick off. We provide full turnkey service (from
design-in
stage/design for bumping and assembly/design for testing services) to achieve design for mass production for new products. These
“co-development”
or “sponsorship” projects can be critical when customers seek large-scale, early market entry with a significant new product.
Research and Development
To maintain our competitive edge for continued business growth, we continue our focus of our investment in new technology research and development. In 2019, 2020 and 2021, we spent approximately NT$1,008 million, or 5.0%, NT$1,016 million, or 4.4% and NT$1,139 million (US$41 million), or 4.2%, respectively, of our revenue on research and development. We intend to sustain these efforts.
Our research and development efforts have been focused primarily on new technology instruction, improving efficiency and production yields of our testing, assembly and bumping services. From time to time, we jointly develop new technologies with local and international equipment and material manufacturing company to enhance the competitiveness. In testing area, our research and development efforts focused particularly on high speed probing, fine pitch probing capability and wafer level
burn-in
technology. Our projects include:
 
   
Ramped up high frequency testing capability of LCD, OLED and other display panel driver semiconductors;
 
34

   
Developing full temperature range
(-40ºC~125ºC)
of FT testing for automotive products;
 
   
Built up 12” fine pitch COF assembly capability for less than 18um inner lead pitch products;
 
   
Developing more flexible COF tape assembly for full-screen display application;
 
   
Developing “wafer level probing on copper pillar bump for 300mm wafers”; and
 
   
Developing centralized server test control system.
In assembly and bumping areas, our research and development efforts were directed to:
 
   
Au height reduction, as part of cost reduction drive, 10um bump height COF package and 8um bump height COG package was released for production;
 
   
Wafer-level chip scale packaging and 3P2M Cu RDL processes;
 
   
Fine-pitch Cu RDL process for WLCSP and RDL products;
 
   
Flip-chip CSP for DRAM and mixed-signal application;
 
   
3P/2M Cu pillar bumping for 300mm wafers high pin count products;
 
   
Developing fine pitch Cu RDL line width and space with 4um/4um for advanced
re-distribution
layer device design requirement;
 
   
Shrink ball size with ball mount technology and combine thinner wafer grind thickness to achieve thin WLCSP requirement;
 
   
Dual/Multi-chip assembly and module of flash products for SSD and eMMC applications;
 
   
Hybrid package by integration of wire binding & flip-chip process with passive components to offer total solution for UFS device;
 
   
DBG/SDBG implementation to enhance the capability of ultra-thin wafer lapping and dicing capabilities for
stacked-die
chip scale package;
 
   
Advanced thin core/core-free, flex substrate solutions for thin and flip chip packages;
 
   
2-metal
layers COF assembly and COF SMT capabilities;
 
   
Qualified thermally enhanced COF and MCB COF and released for manufacturing;
 
   
Double-sided Heat Sink/ High conductivity material development is applied in thermal packaging services for high-resolution panels; and
 
   
Source & Gate ICs integrated technology development is used in product applications with narrow border panels.
For new product and product enhancement work in 2017, our work concentrates on three key development programs: 3D WLCSP, biometric sensor package solutions, and flip chip technology. In the bumping area, we completed customer qualification of 300mm wafer Au bumping process in 2012 and started volume production in the fourth quarter of 2012. Development of Cu plating enables the entry of WLCSP, RDL and flip chip market and Cu RDL applied on DRAM wafer for SiP product is qualified in 2016. Turnkey services of WLCSP and flip chip QFN have been implemented for mass production in 2013 based on the successful technology developments. In 2012, we also initiated both 200mm and 300mm Cu pillar bumping engineering work and, related packaging technologies are being developed for mixed-signal and memory products in 2013. It is also qualified on power management IC product in 2016. According wearable device trend, we miniature fine-pitch Cu RDL process for WLCSP and RDL products, we shrink ball size with ball mount technology and combine thinner wafer grinded thickness to achieve thin WLCSP structure in 2020. By integrating WLCSP bumping, copper pillar bumping and flip chip assembly capability, an integrated WLCSP (CoW or 3D WLCSP) is developing in 2015, and qualified the structure and process verification in 2016. CoW not only provides the cost effective package solution by stacking the different wafer node technology chip, but also could meet integrated function and smallest package footprint. Meanwhile, fingerprint sensor (FPS) packaging solution by LGA was also developed for smartphone demand in 2015. More and more integrated function of DDIC, TDDI and FPS, is requested for smartphone application, therefore
2-metal
layers COF solution and COF SMT are developed to provide the package solution since 2019.
 
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Since 2013,
in-process
engineering advancement allowed us to extend our wirebond technology to service MEMS products. To further achieve cost reduction, alloy wire and 0.6 mil Au wirebond processes were also developed. In 2018, we continued to work on the expansion of multi-chip NAND packages offerings, and 12” fine pitch COF assembly capability. Capability of handling miniature molded packages has been extended to 1x1 mm size and various improvements will also be made in production equipment to enhance throughput and efficiency. In 2019, we launched SDBG technology to implement multi-chip assembly and module of flash products for NAND Flash applications.
As of March 31, 2022 we employed 661 employees in our research and development activities. In addition, other management and operational personnel are also involved in research and development activities but are not separately identified as research and development professionals.
We maintain laboratory facilities capable for materials and electrical characterizations to support production and new product development. Computer simulation is used to validate both mechanical and electrical models in comparison to measurement results. Enhancement of Shadow Moiré and Micro Moiré equipment was carried out to support MCP and flip chip package warpage and residue stress characterization. We also setup up mold flow simulation capability to predict assembly risk. In Advanced Packaging Lab, rheology measurement capability and high frequency electric simulation capability were established, aimed at expanding capability for material selection and inspection to support flip chip introduction and various resin characterizations. An analytical laboratory has been built out in our bumping line providing timely support to manufacturing operations.
Quality Control
We believe that our reputation for high quality and reliable services have been an important factor in attracting and retaining leading international semiconductor companies as customers for our assembly and testing services. We are committed to delivering semiconductors that meet or exceed our customers’ specifications on time and at a competitive cost. We maintain quality control staff at each of our facilities.
As of March 31, 2022, we employed 53 personnel for our quality control activities. Our quality control staff typically includes engineers, technicians and other employees who monitor assembly and test processes in order to ensure high quality. We employ quality control procedures in the following critical areas:
 
   
sales quality assurance: following market trends to anticipate customers’ future needs;
 
   
design quality assurance: when developing new testing and assembly processes;
 
   
supplier quality assurance: consulting with our long-term suppliers;
 
   
manufacturing quality assurance: through a comprehensive monitoring program during mass production; and
 
   
service quality assurance: quickly and effectively responding to customers’ claims after completion of sale.
All of our facilities have obtained ISO 26262 road vehicles-functional safety system certification in December 2019 and obtained IATF 16949 quality system certification in December 2017. In addition, our facilities in Hsinchu and Tainan have been ISO 9002 certified in September 1997 and December 1998, respectively, and recertified with ISO 9001 for substantial revision since 2015.
IATF 16949 certification system seeks to integrate quality management standards into the operation of a company and emphasizes the supervision and measurement of process and performance. An ISO 9001 certification is required by many countries for sales of industrial products.
In addition to the quality management system, we also earned the 1998 QC Group Award from The Chinese Society of Quality, which is equivalent to the similar award from the American Society of Quality and certified ISO17025 in 2000. In 2003, ChipMOS passed SONY Green Partner (Tier 2) certification through its ProMOS channel, and in 2009, ChipMOS obtained SONY Green Partner (Tier 1) certification due to its direct business relationship with SONY. Our laboratories have also been awarded Chinese National Laboratory accreditation under the categories of reliability test, electricity and temperature calibration.
Our assembly and testing operations are carried out in clean rooms where air purity, temperature and humidity are controlled. To ensure the stability and integrity of our operations, we maintain clean rooms at our facilities that meet U.S. federal 209E class 100, 1,000, 10,000 and 100,000 standards. A class 1,000 clean room means a room containing less than 1,000 particles of contaminants per cubic foot.
 
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We have established manufacturing quality control systems that are designed to ensure high-quality services to our customers and maintain reliability and high production yields at our facilities. We employ specialized equipment for manufacturing quality and reliability control, including:
 
   
Joint Electron Device Engineering Council (JEDEC) standardized temperature cycling, thermal shock and pressure cook reliability tests;
 
   
high and low temperature storage life tests, temperature humidity bias test and highly accelerated temperature/humidity stress test (HAST); and
 
   
high resolution scanning acoustic tomography, scanning electronic microscope and
X-Ray
microscopy for physical failure analysis, curve tracer and semi-probe station for electrical failure analysis.
In addition, to enhance our performance and our research and development capabilities, we also installed a series of high-cost equipment, such as temperature humidity bias testers, low temperature storage-life testers and highly accelerated stress testers. We believe that many of our competitors do not own this equipment.
As a result of our ongoing focus on quality, in 2021, we achieved monthly assembly yields of an average of 99.91% for our memory and logic/mixed-signal assembly packages, 99.98% for our COF packages, 99.97% for our COG packages and 99.96% for our bumping products (including gold bump, RDL and WLCSP). The assembly yield, which is the industry standard for measuring production yield, is equal to the number of integrated circuit packages that are shipped back to customers divided by the number of individual integrated circuits that are attached to lead frames or organic substrate.
Raw Materials
Semiconductor testing requires minimal raw materials. Substantially all of the raw materials used in our memory and logic/mixed-signal semiconductor assembly processes are interconnect materials such as leadframes, organic substrates, gold wire and molding compound. Raw materials used in the LCD, OLED and other display panel driver semiconductor assembly and testing process include gold, carrier tape, resin, spacer tape, plastic reel, aluminum bags, and inner and outer boxes. Cost of raw materials represented 18%, 20% and 20% of our revenue in 2019, 2020 and 2021, respectively.
We do not maintain large inventories of leadframes, organic substrates, gold wire or molding compound, but generally maintain sufficient stock of each principal raw material for approximately one month’s production based on blanket orders and rolling forecasts of near-term requirements received from customers. Shortages in the supply of materials experienced by the semiconductor industry have in the past resulted in price adjustments. Our principal raw material supplies have not been impacted by the Japan earthquake and tsunami catastrophe. See “Item 3. Key Information—Risk Factors—Risks Relating to Our Business—If we are unable to obtain raw materials and other necessary inputs from our suppliers in a timely and cost-effective manner, our production schedules would be delayed and we may lose customers and growth opportunities and become less profitable” for a discussion of the risks associated with our raw materials purchasing methods. For example, with the exception of aluminum bags and inner and outer boxes, which we acquire from local sources, the raw materials used in our COF process and for modules are obtained from a limited number of Japanese suppliers.
Competition
The independent assembly and testing markets are very competitive. Our competitors include large IDMs with
in-house
testing and assembly capabilities and other independent semiconductor assembly and testing companies, especially those offering vertically integrated assembly and testing services, such as Advanced Semiconductor Engineering Inc., Amkor Technology, Inc., Chipbond Technology Corporation, King Yuan Electronics Co., Ltd., Powertech Technology Inc., Jiangsu Changjiang Electronics Technology Co., Ltd. and United Test and Assembly Center Ltd. We believe that the principal measures of competitiveness in the independent semiconductor testing industry are:
 
   
engineering capability of software development;
 
   
quality of service;
 
   
flexibility;
 
   
capacity;
 
   
production cycle time; and
 
   
price.
 
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In assembly services, we compete primarily on the basis of:
 
   
production yield;
 
   
production cycle time;
 
   
process technology, including our COF technology for LCD, OLED and other display panel driver semiconductor assembly services;
 
   
quality of service;
 
   
capacity;
 
   
location; and
 
   
price.
IDMs that use our services continually evaluate our performance against their own
in-house
assembly and testing capabilities. These IDMs may have access to more advanced technologies and greater financial and other resources than we do. We believe, however, that we can offer greater efficiency and lower costs while maintaining an equivalent or higher level of quality for three reasons:
 
   
firstly, we offer a broader and more complex range of services as compared to the IDMs, which tend to focus their resources on improving their
front-end
operations;
 
   
secondly, we generally have lower unit costs because of our higher utilization rates and thus enabling us to operate at a more cost-effective structure compared to the IDMs; and
 
   
finally, we offer a wider range of services in terms of complexity and technology.
Intellectual Property
As of March 31, 2022, we held 301 patents in Taiwan, 123 patents in the United States, 192 patents in Mainland China and 1 patent in the United Kingdom and 2 patents in Korea and Japan, respectively, relating to various semiconductor assembly and testing technologies. These patents will expire at various dates through to 2041. As of March 31, 2022, we also had a total of 30 pending patent applications in Taiwan, and 51 in Mainland China. In addition, we have registered “ChipMOS” and its logo as trademarks in Taiwan, the United States, Mainland China, Singapore, Hong Kong, Korea, Japan, the United Kingdom and the European Community.
We expect to continue to file patent applications where appropriate to protect our proprietary technologies. We may need to enforce our patents or other intellectual property rights or to defend ourselves against claimed infringement of the rights of others through litigation, which could result in substantial costs and a diversion of our resources. See “Item 3. Key Information—Risk Factors—Risks Relating to Our Business—Disputes over intellectual property rights could be costly, deprive us of technologies necessary for us to stay competitive, render us unable to provide some of our services and reduce our opportunities to generate revenue”.
Government Regulations
As discussed above under “—Intellectual Property”, governmental regulation of our intellectual property may materially affect our business. The failure to protect our property rights would deprive us of our ability to stay competitive in the semiconductor industry. Our intellectual property rights are protected by the relevant patent and intellectual property agencies of the European Community, the United Kingdom, the United States, Mainland China, Singapore, Hong Kong, Korea, Japan and Taiwan.
Environmental and Climate Change Matters
Semiconductor testing does not generate significant pollutants. The semiconductor assembly and gold bumping process generate stationary acid, alkali and VOC pollutions, principally at the plating and etching stages. Water waste is produced when silicon wafers are ground thinner, diced into chips with the aid of diamond saws and cleaned with running water. In addition, excess materials, either on leadframes or molding process, are removed from assembled semiconductors in the trimming and
de-junking
processes, respectively. We have various treatment equipment for wastewater and air pollutants at our assembly and bumping facilities. Since 2001, we have adopted certain environmental friendly production management systems, and have implemented certain measures intended to bring our all processes in compliance with the Restriction of Hazardous Substances Directive/EC issued by the European Union and our customers. We believe that we have adequate and effective environmental protection measures that are consistent with semiconductor industry practices in Taiwan. In addition, we believe we are in compliance in all material respects with current environmental laws and regulations applicable to our operations and facilities.
 
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All of our facilities in Taiwan have been certified as meeting the ISO 14001 environmental standards of the International Organization for Standardization, and all of our facilities in Taiwan have been certified as meeting the ISO45001 standards of the International Organization for Standardization. Our facilities at Hsinchu Science Park, Chupei, Hukou, Hsinchu Industrial Park and Southern Taiwan Science Park have won numerous awards including “Green Factory Label” from 2013 to 2020, “Enterprises Environmental Protection Gold Grade Award” in 2018 and 2019, “Occupational Safety and Health Excellent Award” in 2016, 2017 and 2021, “Green Building Label” in 2014 and 2017 up to now. We are also certified the “Health Promotion Awards” from 2012 to 2024. We continue to encourage our employees to participate in community environmental campaigns and better environmental friendly practices.
We will continue to enhance related management to reduce industrial waste, save energy and control pollution. For products in conformity with Green Product Requirement, the Company obtained Green Partner certification from Sony Corporation of Japan. Furthermore, we passed QC 080000 certification and “Greenhouse Gas Verification Statement” (“ISO
14064-1”)
from 2013 until now. We further confirmed many products’ CFP “Carbon Footprint Verification Statement” (“ISO 14067”) and WFN “Water Footprint Verification Statement” (“ISO 14046”). At the same time, Tainan and Hsinchu plants passed the certification of energy management system (“ISO 50001”) in 2014 and 2017 up to now. For materials management, we passed the “Material Flow Cost Accounting (MFCA, ISO 14051)” to reduce the loss. Our policy is to pay attention to the environment issues by standardizing on green, environmental friendly products, cleaner process and enhance supplier chain management to meet ChipMOS’ Corporate Social Responsibilities.
As an enterprise, ChipMOS understands the importance of carrying out environmental protection in action. By referencing the Task Force on Climate-related Financial Disclosures (“TCFD”) framework developed by the Financial Stability Board (“FSB”) and began in 2021, we have identified the management needed over risks and opportunities associated with climate change, and further attained a comprehensive overview on the effects of climate change.
Besides depleting the Earth of her resources, energy consumption also generates carbon dioxide, leading to greenhouse effects. Hence, effective energy use will help to mitigate impacts on the environment. Due to the nature of the technology industry, ChipMOS is classified as one of the major electricity consumers per regulations from the Bureau of Energy, MOEA. Upholding our principle of treasuring energy consumption, we began to systematically initiate energy conservation actions in 2012. We continue to introduce various energy efficient technologies and facilities, and on top of Tainan fab’s voluntary introduction of ISO 50001 Energy Management System in 2014, Hsinchu fab also achieved the ISO 50001 Energy Management System certification in 2017. We actively promoted the use of renewable energy sources in 2020 and built solar power generation facilities to continuously increase the consumption ratio of renewable energies.
Environmental, Social and Governance (“ESG”) Initiatives and Sustainable Development Goals (“SDGs”) Linkings
Upholding the mission for ethical and integrity, environmental friendliness, and caring for disadvantaged groups, ChipMOS has formulated substantial implementation objectives for economic, environmental and social aspects, and to actively create a sustainable future. ChipMOS’s Corporate Social Responsibility Best Practice Principles was approved by the Board of Directors in 2013 (renamed as Sustainability Development Principles since February 2022), and CSR committee was established in 2014.
ChipMOS formulates sustainability vision by integrating sustainability policy, organizational vision, and core missions, and inspects the vision’s link to the United Nations’ SDGs. Senior executives in the management team are committed to being aligned with the SDGs and adopted the SDGs. Each organization within ChipMOS has set SDGs as important references in setting annual sustainability goals based on their respective management strategies.
We have launched sustainable actions for all aspects during our business management, including: continuing to enhance corporate governance, complying with ethical management and being committed to the R&D and innovation of core technologies to realize our commitment and responsibilities to employees; and actively invest in green production to reduce harmful effects on the environment during production processes and continuing to enhance resource utilization efficiency to protect the environment. Internally, we persist in the protection and care for employees’ health and welfare while striving in employee development and assisting in their career development. Externally, we are deeply engaged in environmental sustainability and social welfare.
 
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Green Production and Green Manufacturing
Global warming and climate change have become phenomenon that enterprises around the world need to address. ChipMOS continues to follow the Paris Agreement and strives to increase the use of renewable energy and improve the efficiency of energy use on the basis of strengthening adaptation to climate change, so as to reducing greenhouse gases and controlling global temperature rise, on top of enhancing adaptability to climate change. ChipMOS is committed to building solar power generation system up to 8% of the contracted power generation in 2023, planning various energy saving goals and achieve a company-wide energy saving rate more than 1%, and implementing products’ Carbon and Water Footprint and Material Flow Cost Accounting and more. Through reducing consumption and carbon emissions, we hope to reduce the impacts on the environment. At the same time, we also continue to educate employees to enhance their awareness for environmental protection. These efforts have also been extended to our suppliers and stakeholders as we hope to work collectively to become a
low-carbon,
energy-saving, and green enterprise.